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https://github.com/RIOT-OS/RIOT.git
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516c74b81e
If the board defines `FMC_RAM_ADDR` and `FMC_RAM_LEN`, the FMC RAM is used a additional heap if module `periph_fmc` is enabled. For that purpose - the linker symbols `_fmc_ram_addr` and `_fmc_ram_len` are set, - a memory region `fcmram` is added in linker script for the FMC RAM based on these `_fcm_ram_*` linker symbols - a section for the FMC RAM is defined in this memory region that defines the heap by setting `_sheap3` and `_eheap3` and - the number of heaps is set to 4 since to use `_sheap3` and `_eheap3` even though `_sheap1` and `_eheap1` (the backup RAM) and `_sheap2` and `_eheap2` (SRAM4) are not present.
129 lines
4.8 KiB
Makefile
129 lines
4.8 KiB
Makefile
CFLAGS += -DCPU_FAM_STM32$(call uppercase_and_underscore,$(CPU_FAM))
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# For stm32 cpu's we use the generic stm32.ld linker script
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LINKER_SCRIPT ?= stm32.ld
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# Include riotboot specific variables
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include $(RIOTCPU)/stm32/stm32_riotboot.mk
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# Compute ROM_LEN and RAM_LEN
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include $(RIOTCPU)/stm32/stm32_mem_lengths.mk
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KB := 1024
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ROM_LEN_K := $(shell echo $(ROM_LEN) | sed 's/K//')
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RAM_LEN_K := $(shell echo $(RAM_LEN) | sed 's/K//')
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ifneq (,$(filter w%,$(CPU_FAM)))
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ifneq (,$(CPU2_RAM_LEN))
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# adjust RAM_LEN and ROM_LEN according to CPU2 RAM_LEN and ROM_LEN
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CPU2_RAM_LEN_K := $(shell echo $(CPU2_RAM_LEN) | sed 's/K//')
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RAM_LEN := $(shell echo $$(( ($(RAM_LEN_K) - $(CPU2_RAM_LEN_K) ) * $(KB) )))
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else
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RAM_LEN := $(shell echo $$(( $(RAM_LEN_K) * $(KB) )) )
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endif
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ifneq (,$(CPU2_ROM_LEN))
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CPU2_ROM_LEN_K := $(shell echo $(CPU2_ROM_LEN) | sed 's/K//')
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FLASHSIZE := $(shell echo $$(( ($(ROM_LEN_K) - $(CPU2_ROM_LEN_K) )* $(KB) )) )
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ROM_LEN := $(shell echo $$(( ($(ROM_LEN_K) - $(CPU2_ROM_LEN_K) ) ))K)
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else
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FLASHSIZE := $(shell echo $$(( $(ROM_LEN_K) * $(KB) )) )
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endif
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else
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FLASHSIZE := $(shell echo $$(( $(ROM_LEN_K) * $(KB) )) )
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RAM_LEN := $(shell echo $$(( $(RAM_LEN_K) * $(KB) )) )
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endif
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# Get CPU_LINE_ variable
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include $(RIOTCPU)/stm32/stm32_line.mk
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CPU_LINE ?= $(shell echo $(CPU_MODEL) | cut -c -9 | tr 'a-z-' 'A-Z_')xx
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ifeq ($(CONFIG_RDP0),y)
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CFLAGS += -DCONFIG_STM32_RDP=0
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endif
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ifeq ($(CONFIG_RDP1),y)
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CFLAGS += -DCONFIG_STM32_RDP=1
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endif
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ifeq ($(CONFIG_RDP2),y)
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CFLAGS += -DCONFIG_STM32_RDP=2
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endif
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# Set CFLAGS
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CFLAGS += -D$(CPU_LINE) -DCPU_LINE_$(CPU_LINE)
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CFLAGS += -DSTM32_FLASHSIZE=$(FLASHSIZE)U
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info-stm32:
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@$(COLOR_ECHO) "CPU: $(CPU_MODEL)"
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@$(COLOR_ECHO) "\tLine: $(CPU_LINE)"
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@$(COLOR_ECHO) "\tPin count:\t$(STM32_PINS)"
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@$(COLOR_ECHO) "\tROM size:\t$(ROM_LEN) ($(FLASHSIZE) Bytes)"
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@$(COLOR_ECHO) "\tRAM size:\t$(RAM_LEN_K)KiB"
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ifneq (,$(CCMRAM_LEN))
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LINKFLAGS += $(LINKFLAGPREFIX)--defsym=_ccmram_length=$(CCMRAM_LEN)
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endif
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ifneq (,$(SRAM4_LEN))
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LINKFLAGS += $(LINKFLAGPREFIX)--defsym=_sram4_length=$(SRAM4_LEN)
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endif
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# if the board uses a FMC RAM, all 4 heaps have to be used even if
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# some of them are not available
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ifneq (,$(filter periph_fmc_sdram periph_fmc_nor_sram,$(USEMODULE)))
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ifneq (,$(FMC_RAM_LEN))
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LINKFLAGS += $(LINKFLAGPREFIX)--defsym=_fmc_ram_addr=$(FMC_RAM_ADDR)
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LINKFLAGS += $(LINKFLAGPREFIX)--defsym=_fmc_ram_len=$(FMC_RAM_LEN)
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CFLAGS += -DCPU_HAS_FMC_RAM=1
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CFLAGS += -DNUM_HEAPS=4
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endif
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endif
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VECTORS_O ?= $(BINDIR)/stm32_vectors/$(CPU_LINE).o
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VECTORS_FILE = $(RIOTCPU)/stm32/vectors/$(CPU_LINE).c
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BUILDDEPS += $(VECTORS_FILE)
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# CPU_LINE must be exported only when building the vectors object file since
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# the source filename to be built is built from the CPU_LINE content.
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$(call target-export-variables,$(VECTORS_O),CPU_LINE)
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# Add this define to skip the inclusion of the system_stm32xxxx.h header files
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# which are only used for STM32 system includes and not of interest for RIOT.
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CFLAGS += -D__SYSTEM_STM32$(call uppercase,$(CPU_FAM))XX_H
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# C0, G0, H7, L5 and U5 use SYSTEM_STM32..XX_H instead
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CFLAGS += -DSYSTEM_STM32$(call uppercase,$(CPU_FAM))XX_H
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ifneq (,$(filter STM32F030x4 STM32MP157Cxx,$(CPU_LINE)))
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STM32CMSIS_INCLUDE_DIR = $(RIOTCPU)/stm32/include/vendor/cmsis/$(CPU_FAM)/Include
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else
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STM32CMSIS_INCLUDE_DIR = $(BUILD_DIR)/stm32/cmsis/$(CPU_FAM)/Include
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STM32FAM_INCLUDE_FILE = $(STM32CMSIS_INCLUDE_DIR)/stm32$(CPU_FAM)xx.h
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INCLUDES += -I$(STM32CMSIS_INCLUDE_DIR)
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endif
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# Fetch all CMSIS headers using the package mechanism. This rule is called all
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# the time to ensure it's correctly updated when versions in the packages are
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# updated.
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$(STM32FAM_INCLUDE_FILE): FORCE $(CLEAN)
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$(Q)+$(MAKE) -f $(RIOTBASE)/cpu/stm32/Makefile.cmsis
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# The vectors source file requires the family headers to be fetched before since
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# it's generated from the CMSIS content
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$(VECTORS_FILE): $(STM32FAM_INCLUDE_FILE)
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$(Q)$(RIOTBASE)/cpu/stm32/dist/irqs/gen_vectors.py $(STM32CMSIS_INCLUDE_DIR) $(CPU_LINE)
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ifeq (,$(filter STM32MP157Cxx STM32F030x4,$(CPU_LINE)))
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# IRQs of STM32F030x4 and STM32MP157Cxx lines are not available in the CMSIS
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# package so they are hardcoded in RIOTs codebase.
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# For other lines, the IRQs are automatically generated once from the whole
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# list of CMSIS headers available in a given family
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STM32IRQS_INCLUDE_FILE = $(RIOTCPU)/stm32/include/irqs/$(CPU_FAM)/irqs.h
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BUILDDEPS += $(STM32IRQS_INCLUDE_FILE)
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endif
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# The IRQ header for a given family requires the family headers to be fetched
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# before since it's generated from all CMSIS content of that family
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$(STM32IRQS_INCLUDE_FILE): $(STM32FAM_INCLUDE_FILE)
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$(Q)$(RIOTBASE)/cpu/stm32/dist/irqs/gen_irqs.py $(STM32CMSIS_INCLUDE_DIR) $(CPU_FAM)
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# Include clock configuration directory
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INCLUDES += -I$(RIOTCPU)/stm32/include/clk
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include $(RIOTMAKE)/arch/cortexm.inc.mk
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