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119 lines
2.9 KiB
C
119 lines
2.9 KiB
C
/*
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* Copyright (C) 2023 Mesotic SAS
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*
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* This file is subject to the terms and conditions of the GNU Lesser
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* General Public License v2.1. See the file LICENSE in the top level
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* directory for more details.
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*/
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/**
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* @ingroup cpu_nrf53
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* @{
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*
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* @file
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* @brief nRF5340 interrupt vector definitions
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*
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* @author Dylan Laduranty <dylan.laduranty@mesotic.com>
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*
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* @}
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*/
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#include <stdint.h>
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#include "cpu.h"
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#include "vectors_cortexm.h"
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/* define a local dummy handler as it needs to be in the same compilation unit
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* as the alias definition */
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void dummy_handler(void) {
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dummy_handler_default();
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}
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/* nRF5340 specific interrupt vectors */
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WEAK_DEFAULT void isr_fpu(void);
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WEAK_DEFAULT void isr_cache(void);
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WEAK_DEFAULT void isr_spu(void);
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WEAK_DEFAULT void isr_clock_power(void);
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WEAK_DEFAULT void isr_serial0(void);
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WEAK_DEFAULT void isr_serial1(void);
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WEAK_DEFAULT void isr_spim4(void);
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WEAK_DEFAULT void isr_serial2(void);
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WEAK_DEFAULT void isr_serial3(void);
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WEAK_DEFAULT void isr_gpiote0(void);
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WEAK_DEFAULT void isr_saadc(void);
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WEAK_DEFAULT void isr_timer0(void);
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WEAK_DEFAULT void isr_timer1(void);
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WEAK_DEFAULT void isr_timer2(void);
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WEAK_DEFAULT void isr_rtc0(void);
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WEAK_DEFAULT void isr_rtc1(void);
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WEAK_DEFAULT void isr_wdt0(void);
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WEAK_DEFAULT void isr_wdt1(void);
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WEAK_DEFAULT void isr_comp_ltcomp(void);
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WEAK_DEFAULT void isr_egu0(void);
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WEAK_DEFAULT void isr_egu1(void);
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WEAK_DEFAULT void isr_egu2(void);
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WEAK_DEFAULT void isr_egu3(void);
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WEAK_DEFAULT void isr_egu4(void);
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WEAK_DEFAULT void isr_egu5(void);
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WEAK_DEFAULT void isr_pwm0(void);
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WEAK_DEFAULT void isr_pwm1(void);
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WEAK_DEFAULT void isr_pwm2(void);
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WEAK_DEFAULT void isr_pwm3(void);
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WEAK_DEFAULT void isr_pdm0(void);
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WEAK_DEFAULT void isr_i2s0(void);
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WEAK_DEFAULT void isr_ipc(void);
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WEAK_DEFAULT void isr_qspi(void);
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WEAK_DEFAULT void isr_nfct(void);
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WEAK_DEFAULT void isr_gpiote1(void);
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WEAK_DEFAULT void isr_qdec0(void);
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WEAK_DEFAULT void isr_qdec1(void);
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WEAK_DEFAULT void isr_usbd(void);
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WEAK_DEFAULT void isr_usb_regulator(void);
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WEAK_DEFAULT void isr_kmu(void);
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WEAK_DEFAULT void isr_cryptocell(void);
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/* CPU specific interrupt vector table */
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ISR_VECTOR(1) const isr_t vector_cpu[CPU_IRQ_NUMOF] = {
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[0] = isr_fpu,
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[1] = isr_cache,
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[3] = isr_spu,
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[5] = isr_clock_power,
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[8] = isr_serial0,
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[9] = isr_serial1,
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[10] = isr_spim4,
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[11] = isr_serial2,
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[12] = isr_serial3,
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[13] = isr_gpiote0,
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[14] = isr_saadc,
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[15] = isr_timer0,
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[16] = isr_timer1,
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[17] = isr_timer2,
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[20] = isr_rtc0,
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[21] = isr_rtc1,
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[24] = isr_wdt0,
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[25] = isr_wdt1,
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[26] = isr_comp_ltcomp,
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[27] = isr_egu0,
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[28] = isr_egu1,
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[29] = isr_egu2,
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[30] = isr_egu3,
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[31] = isr_egu4,
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[32] = isr_egu5,
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[33] = isr_pwm0,
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[34] = isr_pwm1,
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[35] = isr_pwm2,
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[36] = isr_pwm3,
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[38] = isr_pdm0,
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[40] = isr_i2s0,
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[42] = isr_ipc,
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[43] = isr_qspi,
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[45] = isr_nfct,
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[47] = isr_gpiote1,
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[51] = isr_qdec0,
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[52] = isr_qdec1,
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[54] = isr_usbd,
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[55] = isr_usb_regulator,
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[57] = isr_kmu,
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[68] = isr_cryptocell
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};
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