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107 lines
3.3 KiB
C
107 lines
3.3 KiB
C
/*
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* Copyright (C) 2016 Freie Universität Berlin
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* 2020 Philipp-Alexander Blum <philipp-blum@jakiku.de>
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*
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* This file is subject to the terms and conditions of the GNU Lesser
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* General Public License v2.1. See the file LICENSE in the top level
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* directory for more details.
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*/
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/**
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* @ingroup cpu_nrf52
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* @{
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*
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* @file
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* @brief nRF52810 interrupt vector definitions
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*
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* @author Benjamin Valentin <benpicco@googlemail.com>
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*
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* @}
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*/
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#include <stdint.h>
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#include "cpu.h"
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#include "vectors_cortexm.h"
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/* define a local dummy handler as it needs to be in the same compilation unit
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* as the alias definition */
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void dummy_handler(void) {
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dummy_handler_default();
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}
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/* nRF52 specific interrupt vectors */
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WEAK_DEFAULT void isr_power_clock(void);
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WEAK_DEFAULT void isr_radio(void);
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WEAK_DEFAULT void isr_uart0(void);
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WEAK_DEFAULT void isr_spi0(void);
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WEAK_DEFAULT void isr_spi0_twi0(void);
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WEAK_DEFAULT void isr_spi1_twi0(void);
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WEAK_DEFAULT void isr_spi1_twi1(void);
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WEAK_DEFAULT void isr_nfct(void);
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WEAK_DEFAULT void isr_gpiote(void);
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WEAK_DEFAULT void isr_saadc(void);
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WEAK_DEFAULT void isr_timer0(void);
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WEAK_DEFAULT void isr_timer1(void);
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WEAK_DEFAULT void isr_timer2(void);
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WEAK_DEFAULT void isr_rtc0(void);
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WEAK_DEFAULT void isr_temp(void);
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WEAK_DEFAULT void isr_twi0(void);
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WEAK_DEFAULT void isr_rng(void);
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WEAK_DEFAULT void isr_ecb(void);
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WEAK_DEFAULT void isr_ccm_aar(void);
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WEAK_DEFAULT void isr_wdt(void);
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WEAK_DEFAULT void isr_rtc1(void);
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WEAK_DEFAULT void isr_qdec(void);
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WEAK_DEFAULT void isr_lpcomp(void);
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WEAK_DEFAULT void isr_swi0(void);
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WEAK_DEFAULT void isr_swi1(void);
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WEAK_DEFAULT void isr_swi2(void);
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WEAK_DEFAULT void isr_swi3(void);
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WEAK_DEFAULT void isr_swi4(void);
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WEAK_DEFAULT void isr_swi5(void);
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WEAK_DEFAULT void isr_timer3(void);
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WEAK_DEFAULT void isr_timer4(void);
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WEAK_DEFAULT void isr_pwm0(void);
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WEAK_DEFAULT void isr_pdm(void);
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WEAK_DEFAULT void isr_mwu(void);
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WEAK_DEFAULT void isr_pwm1(void);
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WEAK_DEFAULT void isr_pwm2(void);
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WEAK_DEFAULT void isr_spi2(void);
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WEAK_DEFAULT void isr_rtc2(void);
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WEAK_DEFAULT void isr_i2s(void);
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/* CPU specific interrupt vector table */
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ISR_VECTOR(1) const isr_t vector_cpu[CPU_IRQ_NUMOF] = {
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isr_power_clock, /* power_clock */
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isr_radio, /* radio */
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isr_uart0, /* uart0 */
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isr_twi0, /* twi 0 */
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isr_spi0, /* spi 0 */
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(0UL), /* reserved */
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isr_gpiote, /* gpiote */
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isr_saadc, /* adc */
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isr_timer0, /* timer0 */
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isr_timer1, /* timer1 */
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isr_timer2, /* timer2 */
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isr_rtc0, /* rtc0 */
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isr_temp, /* temp */
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isr_rng, /* rng */
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isr_ecb, /* ecb */
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isr_ccm_aar, /* ccm_aar */
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isr_wdt, /* wdt */
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isr_rtc1, /* rtc1 */
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isr_qdec, /* qdec */
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isr_lpcomp, /* lpcomp */
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isr_swi0, /* swi0 */
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isr_swi1, /* swi1 */
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isr_swi2, /* swi2 */
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isr_swi3, /* swi3 */
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isr_swi4, /* swi4 */
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isr_swi5, /* swi5 */
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(0UL), /* reserved */
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(0UL), /* reserved */
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isr_pwm0, /* pwm 0 */
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isr_pdm, /* pdm */
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};
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