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cpu/nrf52: remove specific handling of softdevice

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This commit is contained in:
Alexandre Abadie 2020-10-28 13:56:15 +01:00
parent 4d91832795
commit fd6f6e248c
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GPG Key ID: 1C919A403CAE1405
12 changed files with 0 additions and 205 deletions
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1
cpu/nrf52/Kconfig
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@ -42,7 +42,6 @@ config CPU_MODEL_NRF52832XXAA
bool
select CPU_FAM_NRF52
select CPU_CORE_CORTEX_M4F
select HAS_BLE_NORDIC_SOFTDEVICE
config CPU_MODEL_NRF52833XXAA
bool

15
cpu/nrf52/cpu.c
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@ -34,11 +34,6 @@ static bool ftpan_32(void);
static bool ftpan_37(void);
static bool ftpan_36(void);
#ifdef SOFTDEVICE_PRESENT
#include "softdevice_handler.h"
uint8_t _ble_evt_buffer[BLE_STACK_EVT_MSG_BUF_SIZE];
#endif
/**
* @brief Initialize the CPU, set IRQ priorities
*/
@ -73,18 +68,8 @@ void cpu_init(void)
NRF_NVMC->ICACHECNF = (NVMC_ICACHECNF_CACHEEN_Msk);
#endif
/* softdevice needs to be enabled from ISR context */
#ifdef SOFTDEVICE_PRESENT
softdevice_handler_init(NRF_CLOCK_LFCLKSRC_XTAL_20_PPM, &_ble_evt_buffer,
BLE_STACK_EVT_MSG_BUF_SIZE, NULL);
/* fixup swi0 (used as softdevice PendSV trampoline) */
NVIC_EnableIRQ(SWI0_EGU0_IRQn);
NVIC_SetPriority(SWI0_EGU0_IRQn, 6);
#else
/* call cortexm default initialization */
cortexm_init();
#endif
/* enable wake up on events for __WFE CPU sleep */
SCB->SCR |= SCB_SCR_SEVONPEND_Msk;

13
cpu/nrf52/include/cpu_conf.h
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@ -112,19 +112,6 @@ extern "C" {
#define FLASHPAGE_RAW_ALIGNMENT (4U)
/** @} */
/**
* @brief SoftDevice settings
* @{
*/
#ifdef SOFTDEVICE_PRESENT
#ifndef DONT_OVERRIDE_NVIC
#include "nrf_soc.h"
#undef NVIC_SetPriority
#define NVIC_SetPriority sd_nvic_SetPriority
#endif /* DONT_OVERRIDE_NVIC */
#endif /* SOFTDEVICE_PRESENT */
/** @} */
#ifdef CPU_MODEL_NRF52840XXAA
/**
* @name OpenWSN timing constants

18
cpu/nrf52/vectors/vectors_nrf52805xxaa.c
View File

@ -53,21 +53,7 @@ WEAK_DEFAULT void isr_wdt(void);
WEAK_DEFAULT void isr_rtc1(void);
WEAK_DEFAULT void isr_qdec(void);
WEAK_DEFAULT void isr_lpcomp(void);
#ifndef SOFTDEVICE_PRESENT
WEAK_DEFAULT void isr_swi0(void);
#else
/* For unknown reasons, setting PendSV pending within
* the softdevice ISRs leads to a crash. This workaround
* uses swi0 as trampoline.
*/
extern void thread_yield_higher(void);
void isr_swi0(void)
{
thread_yield_higher();
}
#endif
WEAK_DEFAULT void isr_swi1(void);
WEAK_DEFAULT void isr_swi2(void);
WEAK_DEFAULT void isr_swi3(void);
@ -84,10 +70,6 @@ WEAK_DEFAULT void isr_spi2(void);
WEAK_DEFAULT void isr_rtc2(void);
WEAK_DEFAULT void isr_i2s(void);
#ifdef SOFTDEVICE_PRESENT
extern void SWI2_EGU2_IRQHandler(void);
#endif
/* CPU specific interrupt vector table */
ISR_VECTOR(1) const isr_t vector_cpu[CPU_IRQ_NUMOF] = {
isr_power_clock, /* power_clock */

18
cpu/nrf52/vectors/vectors_nrf52810xxaa.c
View File

@ -54,21 +54,7 @@ WEAK_DEFAULT void isr_wdt(void);
WEAK_DEFAULT void isr_rtc1(void);
WEAK_DEFAULT void isr_qdec(void);
WEAK_DEFAULT void isr_lpcomp(void);
#ifndef SOFTDEVICE_PRESENT
WEAK_DEFAULT void isr_swi0(void);
#else
/* For unknown reasons, setting PendSV pending within
* the softdevice ISRs leads to a crash. This workaround
* uses swi0 as trampoline.
*/
extern void thread_yield_higher(void);
void isr_swi0(void)
{
thread_yield_higher();
}
#endif
WEAK_DEFAULT void isr_swi1(void);
WEAK_DEFAULT void isr_swi2(void);
WEAK_DEFAULT void isr_swi3(void);
@ -85,10 +71,6 @@ WEAK_DEFAULT void isr_spi2(void);
WEAK_DEFAULT void isr_rtc2(void);
WEAK_DEFAULT void isr_i2s(void);
#ifdef SOFTDEVICE_PRESENT
extern void SWI2_EGU2_IRQHandler(void);
#endif
/* CPU specific interrupt vector table */
ISR_VECTOR(1) const isr_t vector_cpu[CPU_IRQ_NUMOF] = {
isr_power_clock, /* power_clock */

18
cpu/nrf52/vectors/vectors_nrf52811xxaa.c
View File

@ -55,21 +55,7 @@ WEAK_DEFAULT void isr_wdt(void);
WEAK_DEFAULT void isr_rtc1(void);
WEAK_DEFAULT void isr_qdec(void);
WEAK_DEFAULT void isr_lpcomp(void);
#ifndef SOFTDEVICE_PRESENT
WEAK_DEFAULT void isr_swi0(void);
#else
/* For unknown reasons, setting PendSV pending within
* the softdevice ISRs leads to a crash. This workaround
* uses swi0 as trampoline.
*/
extern void thread_yield_higher(void);
void isr_swi0(void)
{
thread_yield_higher();
}
#endif
WEAK_DEFAULT void isr_swi1(void);
WEAK_DEFAULT void isr_swi2(void);
WEAK_DEFAULT void isr_swi3(void);
@ -86,10 +72,6 @@ WEAK_DEFAULT void isr_spi2(void);
WEAK_DEFAULT void isr_rtc2(void);
WEAK_DEFAULT void isr_i2s(void);
#ifdef SOFTDEVICE_PRESENT
extern void SWI2_EGU2_IRQHandler(void);
#endif
/* CPU specific interrupt vector table */
ISR_VECTOR(1) const isr_t vector_cpu[CPU_IRQ_NUMOF] = {
isr_power_clock, /* power_clock */

22
cpu/nrf52/vectors/vectors_nrf52820xxaa.c
View File

@ -54,21 +54,7 @@ WEAK_DEFAULT void isr_wdt(void);
WEAK_DEFAULT void isr_rtc1(void);
WEAK_DEFAULT void isr_qdec(void);
WEAK_DEFAULT void isr_lpcomp(void);
#ifndef SOFTDEVICE_PRESENT
WEAK_DEFAULT void isr_swi0(void);
#else
/* For unknown reasons, setting PendSV pending within
* the softdevice ISRs leads to a crash. This workaround
* uses swi0 as trampoline.
*/
extern void thread_yield_higher(void);
void isr_swi0(void)
{
thread_yield_higher();
}
#endif
WEAK_DEFAULT void isr_swi1(void);
WEAK_DEFAULT void isr_swi2(void);
WEAK_DEFAULT void isr_swi3(void);
@ -92,10 +78,6 @@ WEAK_DEFAULT void isr_cryptocell(void);
WEAK_DEFAULT void isr_spi3(void);
WEAK_DEFAULT void isr_pwm3(void);
#ifdef SOFTDEVICE_PRESENT
extern void SWI2_EGU2_IRQHandler(void);
#endif
/* CPU specific interrupt vector table */
ISR_VECTOR(1)
const isr_t vector_cpu[CPU_IRQ_NUMOF] = {
@ -121,11 +103,7 @@ const isr_t vector_cpu[CPU_IRQ_NUMOF] = {
isr_lpcomp, /* lpcomp */
isr_swi0, /* swi0 */
isr_swi1, /* swi1 */
#ifdef SOFTDEVICE_PRESENT
SWI2_EGU2_IRQHandler, /* softdevice swi handler */
#else
isr_swi2, /* swi2 */
#endif
isr_swi3, /* swi3 */
isr_swi4, /* swi4 */
isr_swi5, /* swi5 */

22
cpu/nrf52/vectors/vectors_nrf52832xxaa.c
View File

@ -53,21 +53,7 @@ WEAK_DEFAULT void isr_wdt(void);
WEAK_DEFAULT void isr_rtc1(void);
WEAK_DEFAULT void isr_qdec(void);
WEAK_DEFAULT void isr_lpcomp(void);
#ifndef SOFTDEVICE_PRESENT
WEAK_DEFAULT void isr_swi0(void);
#else
/* For unknown reasons, setting PendSV pending within
* the softdevice ISRs leads to a crash. This workaround
* uses swi0 as trampoline.
*/
extern void thread_yield_higher(void);
void isr_swi0(void)
{
thread_yield_higher();
}
#endif
WEAK_DEFAULT void isr_swi1(void);
WEAK_DEFAULT void isr_swi2(void);
WEAK_DEFAULT void isr_swi3(void);
@ -85,10 +71,6 @@ WEAK_DEFAULT void isr_rtc2(void);
WEAK_DEFAULT void isr_i2s(void);
WEAK_DEFAULT void isr_fpu(void);
#ifdef SOFTDEVICE_PRESENT
extern void SWI2_EGU2_IRQHandler(void);
#endif
/* CPU specific interrupt vector table */
ISR_VECTOR(1)
const isr_t vector_cpu[CPU_IRQ_NUMOF] = {
@ -114,11 +96,7 @@ const isr_t vector_cpu[CPU_IRQ_NUMOF] = {
isr_lpcomp, /* lpcomp */
isr_swi0, /* swi0 */
isr_swi1, /* swi1 */
#ifdef SOFTDEVICE_PRESENT
SWI2_EGU2_IRQHandler, /* softdevice swi handler */
#else
isr_swi2, /* swi2 */
#endif
isr_swi3, /* swi3 */
isr_swi4, /* swi4 */
isr_swi5, /* swi5 */

22
cpu/nrf52/vectors/vectors_nrf52833xxaa.c
View File

@ -53,21 +53,7 @@ WEAK_DEFAULT void isr_wdt(void);
WEAK_DEFAULT void isr_rtc1(void);
WEAK_DEFAULT void isr_qdec(void);
WEAK_DEFAULT void isr_lpcomp(void);
#ifndef SOFTDEVICE_PRESENT
WEAK_DEFAULT void isr_swi0(void);
#else
/* For unknown reasons, setting PendSV pending within
* the softdevice ISRs leads to a crash. This workaround
* uses swi0 as trampoline.
*/
extern void thread_yield_higher(void);
void isr_swi0(void)
{
thread_yield_higher();
}
#endif
WEAK_DEFAULT void isr_swi1(void);
WEAK_DEFAULT void isr_swi2(void);
WEAK_DEFAULT void isr_swi3(void);
@ -91,10 +77,6 @@ WEAK_DEFAULT void isr_cryptocell(void);
WEAK_DEFAULT void isr_spi3(void);
WEAK_DEFAULT void isr_pwm3(void);
#ifdef SOFTDEVICE_PRESENT
extern void SWI2_EGU2_IRQHandler(void);
#endif
/* CPU specific interrupt vector table */
ISR_VECTOR(1)
const isr_t vector_cpu[CPU_IRQ_NUMOF] = {
@ -120,11 +102,7 @@ const isr_t vector_cpu[CPU_IRQ_NUMOF] = {
isr_lpcomp, /* lpcomp */
isr_swi0, /* swi0 */
isr_swi1, /* swi1 */
#ifdef SOFTDEVICE_PRESENT
SWI2_EGU2_IRQHandler, /* softdevice swi handler */
#else
isr_swi2, /* swi2 */
#endif
isr_swi3, /* swi3 */
isr_swi4, /* swi4 */
isr_swi5, /* swi5 */

22
cpu/nrf52/vectors/vectors_nrf52840xxaa.c
View File

@ -53,21 +53,7 @@ WEAK_DEFAULT void isr_wdt(void);
WEAK_DEFAULT void isr_rtc1(void);
WEAK_DEFAULT void isr_qdec(void);
WEAK_DEFAULT void isr_lpcomp(void);
#ifndef SOFTDEVICE_PRESENT
WEAK_DEFAULT void isr_swi0(void);
#else
/* For unknown reasons, setting PendSV pending within
* the softdevice ISRs leads to a crash. This workaround
* uses swi0 as trampoline.
*/
extern void thread_yield_higher(void);
void isr_swi0(void)
{
thread_yield_higher();
}
#endif
WEAK_DEFAULT void isr_swi1(void);
WEAK_DEFAULT void isr_swi2(void);
WEAK_DEFAULT void isr_swi3(void);
@ -91,10 +77,6 @@ WEAK_DEFAULT void isr_cryptocell(void);
WEAK_DEFAULT void isr_spi3(void);
WEAK_DEFAULT void isr_pwm3(void);
#ifdef SOFTDEVICE_PRESENT
extern void SWI2_EGU2_IRQHandler(void);
#endif
/* CPU specific interrupt vector table */
ISR_VECTOR(1)
const isr_t vector_cpu[CPU_IRQ_NUMOF] = {
@ -120,11 +102,7 @@ const isr_t vector_cpu[CPU_IRQ_NUMOF] = {
isr_lpcomp, /* lpcomp */
isr_swi0, /* swi0 */
isr_swi1, /* swi1 */
#ifdef SOFTDEVICE_PRESENT
SWI2_EGU2_IRQHandler, /* softdevice swi handler */
#else
isr_swi2, /* swi2 */
#endif
isr_swi3, /* swi3 */
isr_swi4, /* swi4 */
isr_swi5, /* swi5 */

6
cpu/nrf5x_common/Kconfig
View File

@ -42,10 +42,4 @@ config HAS_RADIO_NRFMIN
Indicates that a radio compatible with the nRF minimal radio driver is
present.
config HAS_BLE_NORDIC_SOFTDEVICE
bool
help
Indicates that Nordic SoftDevice support in RIOT has been verified on the
current platform.
source "$(RIOTCPU)/cortexm_common/Kconfig"

28
cpu/nrf5x_common/periph/hwrng.c
View File

@ -24,9 +24,7 @@
#include "cpu.h"
#include "periph/hwrng.h"
#ifndef MODULE_NORDIC_SOFTDEVICE_BLE
#include "assert.h"
#endif
void hwrng_init(void)
{
@ -34,11 +32,6 @@ void hwrng_init(void)
NRF_RNG->CONFIG = 1;
}
/*
* The hardware peripheral is used by the SoftDevice. When the SoftDevice is
* enabled, it shall only be accessed through the SoftDevice API
*/
#ifndef MODULE_NORDIC_SOFTDEVICE_BLE
void hwrng_read(void *buf, unsigned int num)
{
unsigned int count = 0;
@ -71,24 +64,3 @@ void hwrng_read(void *buf, unsigned int num)
NRF_RNG->POWER = 0;
#endif
}
#else
void hwrng_read(void *buf, unsigned int num)
{
uint32_t ret;
uint8_t avail;
assert(num <= 0xff);
/* this is not the most efficient, but this way we can assure that there are
* enough bytes of random data available */
do {
sd_rand_application_bytes_available_get(&avail);
} while (avail < (uint8_t)num);
ret = sd_rand_application_vector_get((uint8_t *)buf, (uint8_t)num);
assert(ret == NRF_SUCCESS);
(void)ret;
}
#endif /* MODULE_NORDIC_SOFTDEVICE_BLE */