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https://github.com/RIOT-OS/RIOT.git
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148 lines
4.0 KiB
C
148 lines
4.0 KiB
C
/*
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* Copyright (C) 2016 Freie Universität Berlin
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* 2020 Philipp-Alexander Blum <philipp-blum@jakiku.de>
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*
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* This file is subject to the terms and conditions of the GNU Lesser
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* General Public License v2.1. See the file LICENSE in the top level
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* directory for more details.
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*/
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/**
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* @defgroup cpu_nrf52 Nordic nRF52 MCU
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* @ingroup cpu
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* @brief Nordic nRF52 family of CPUs
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* @{
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*
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* @file
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* @brief nRF52 specific CPU configuration
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*
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* @author Hauke Petersen <hauke.petersen@fu-berlin.de>
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* @author Philipp-Alexander Blum <philipp-blum@jakiku.de>
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*
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*/
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#ifndef CPU_CONF_H
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#define CPU_CONF_H
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#include "cpu_conf_common.h"
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#ifdef CPU_MODEL_NRF52832XXAA
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#include "vendor/nrf52.h"
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#include "vendor/nrf52_bitfields.h"
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#include "vendor/nrf52832_peripherals.h"
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#elif defined(CPU_MODEL_NRF52805XXAA)
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#include "vendor/nrf52805.h"
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#include "vendor/nrf52805_bitfields.h"
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#include "vendor/nrf52805_peripherals.h"
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#elif defined(CPU_MODEL_NRF52810XXAA)
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#include "vendor/nrf52810.h"
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#include "vendor/nrf52810_bitfields.h"
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#include "vendor/nrf52810_peripherals.h"
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#elif defined(CPU_MODEL_NRF52811XXAA)
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#include "vendor/nrf52811.h"
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#include "vendor/nrf52811_bitfields.h"
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#include "vendor/nrf52811_peripherals.h"
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#elif defined(CPU_MODEL_NRF52820XXAA)
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#include "vendor/nrf52820.h"
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#include "vendor/nrf52820_bitfields.h"
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#include "vendor/nrf52820_peripherals.h"
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#elif defined(CPU_MODEL_NRF52833XXAA)
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#include "vendor/nrf52833.h"
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#include "vendor/nrf52833_bitfields.h"
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#include "vendor/nrf52833_peripherals.h"
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#elif defined(CPU_MODEL_NRF52840XXAA)
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#include "vendor/nrf52840.h"
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#include "vendor/nrf52840_bitfields.h"
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#include "vendor/nrf52840_peripherals.h"
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#else
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#error "The CPU_MODEL of your board is currently not supported"
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#endif
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#ifdef __cplusplus
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extern "C" {
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#endif
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/**
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* @name ARM Cortex-M specific CPU configuration
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* @{
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*/
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#define CPU_DEFAULT_IRQ_PRIO (2U)
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#define CPU_FLASH_BASE (0x00000000)
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#if defined(CPU_MODEL_NRF52805XXAA)
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#define CPU_IRQ_NUMOF (26U)
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#elif defined(CPU_MODEL_NRF52810XXAA)
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#define CPU_IRQ_NUMOF (30U)
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#elif defined(CPU_MODEL_NRF52811XXAA)
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#define CPU_IRQ_NUMOF (30U)
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#elif defined(CPU_MODEL_NRF52820XXAA)
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#define CPU_IRQ_NUMOF (40U)
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#elif defined(CPU_MODEL_NRF52832XXAA)
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#define CPU_IRQ_NUMOF (39U)
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#elif defined(CPU_MODEL_NRF52833XXAA)
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#define CPU_IRQ_NUMOF (48U)
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#elif defined(CPU_MODEL_NRF52840XXAA)
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#define CPU_IRQ_NUMOF (48U)
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#endif
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/** @} */
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/**
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* @brief Flash page configuration
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* @{
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*/
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#ifdef BPROT_PRESENT
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#define FLASHPAGE_SIZE BPROT_REGIONS_SIZE
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#define FLASHPAGE_NUMOF BPROT_REGIONS_NUM
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#elif defined(CPU_MODEL_NRF52820XXAA)
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#define FLASHPAGE_SIZE (4096U)
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#define FLASHPAGE_NUMOF (64U)
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#elif defined(CPU_MODEL_NRF52833XXAA)
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#define FLASHPAGE_SIZE (4096U)
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#define FLASHPAGE_NUMOF (128U)
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#elif defined(CPU_MODEL_NRF52840XXAA)
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#define FLASHPAGE_SIZE (4096U)
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#define FLASHPAGE_NUMOF (256U)
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#endif
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/* The minimum block size which can be written is 4B. However, the erase
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* block is always FLASHPAGE_SIZE.
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*/
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#define FLASHPAGE_WRITE_BLOCK_SIZE (4U)
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/* Writing should be always 4 bytes aligned */
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#define FLASHPAGE_WRITE_BLOCK_ALIGNMENT (4U)
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/** @} */
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#ifdef CPU_MODEL_NRF52840XXAA
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/**
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* @name OpenWSN timing constants
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*
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* @{
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*/
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/* Taken from OpenWSN @32.768Hz */
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#define PORT_maxTxDataPrepare (400/PORT_US_PER_TICK)
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#define PORT_maxRxAckPrepare (400/PORT_US_PER_TICK)
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#define PORT_maxRxDataPrepare (400/PORT_US_PER_TICK)
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#define PORT_maxTxAckPrepare (400/PORT_US_PER_TICK)
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/* Measured 220us */
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#define PORT_delayTx (300/PORT_US_PER_TICK)
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#define PORT_delayRx (150/PORT_US_PER_TICK)
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/** @} */
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#endif
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/**
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* @brief Put the CPU in the low-power 'wait for event' state
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*/
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static inline void nrf52_sleep(void)
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{
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__SEV();
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__WFE();
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__asm("nop");
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}
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#ifdef __cplusplus
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}
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#endif
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#endif /* CPU_CONF_H */
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/** @} */
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