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https://github.com/RIOT-OS/RIOT.git
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158 lines
3.9 KiB
C
158 lines
3.9 KiB
C
/*
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* Copyright (C) 2019 Inria
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*
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* This file is subject to the terms and conditions of the GNU Lesser
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* General Public License v2.1. See the file LICENSE in the top level
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* directory for more details.
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*/
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/**
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* @ingroup boards_p-l496g-cell02
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* @{
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*
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* @file
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* @brief Peripheral MCU configuration for the P-L496G-CELL02 board
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*
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* @author Alexandre Abadie <alexandre.abadie@inria.fr>
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*/
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#ifndef PERIPH_CONF_H
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#define PERIPH_CONF_H
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/* Add specific clock configuration (HSE, LSE) for this board here */
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#ifndef CONFIG_BOARD_HAS_LSE
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#define CONFIG_BOARD_HAS_LSE 1
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#endif
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#include "periph_cpu.h"
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#include "clk_conf.h"
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#include "cfg_rtt_default.h"
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#include "cfg_timer_tim2.h"
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#include "cfg_usb_otg_fs.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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/**
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* @name UART configuration
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* @{
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*/
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static const uart_conf_t uart_config[] = {
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{
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.dev = USART2,
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.rcc_mask = RCC_APB1ENR1_USART2EN,
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.rx_pin = GPIO_PIN(PORT_D, 6),
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.tx_pin = GPIO_PIN(PORT_A, 2),
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.rx_af = GPIO_AF7,
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.tx_af = GPIO_AF7,
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.bus = APB1,
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.irqn = USART2_IRQn,
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#ifdef MODULE_PERIPH_UART_HW_FC
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.cts_pin = GPIO_UNDEF,
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.rts_pin = GPIO_UNDEF,
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.cts_af = GPIO_AF7,
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.rts_af = GPIO_AF7,
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#endif
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.type = STM32_USART,
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.clk_src = 0, /* Use APB clock */
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},
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{ /* Arduino pinout RX/TX pins on D0/D1 */
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.dev = LPUART1,
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.rcc_mask = RCC_APB1ENR2_LPUART1EN,
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.rx_pin = GPIO_PIN(PORT_G, 8),
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.tx_pin = GPIO_PIN(PORT_G, 7),
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.rx_af = GPIO_AF8,
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.tx_af = GPIO_AF8,
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.bus = APB12,
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.irqn = LPUART1_IRQn,
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#ifdef MODULE_PERIPH_UART_HW_FC
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.cts_pin = GPIO_UNDEF,
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.rts_pin = GPIO_UNDEF,
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.cts_af = GPIO_AF7,
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.rts_af = GPIO_AF7,
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#endif
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.type = STM32_LPUART,
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.clk_src = 0,
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},
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{ /* STMod+/PMOD connectors */
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.dev = USART1,
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.rcc_mask = RCC_APB2ENR_USART1EN,
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.rx_pin = GPIO_PIN(PORT_G, 10),
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.tx_pin = GPIO_PIN(PORT_B, 6),
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.rx_af = GPIO_AF7,
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.tx_af = GPIO_AF7,
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.bus = APB2,
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.irqn = USART1_IRQn,
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#ifdef MODULE_PERIPH_UART_HW_FC
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.cts_pin = GPIO_PIN(PORT_G, 11),
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.rts_pin = GPIO_PIN(PORT_G, 12),
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.cts_af = GPIO_AF7,
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.rts_af = GPIO_AF7,
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#endif
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.type = STM32_USART,
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.clk_src = 0, /* Use APB clock */
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}
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};
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#define UART_0_ISR (isr_usart2)
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#define UART_1_ISR (isr_lpuart1)
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#define UART_2_ISR (isr_usart1)
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#define UART_NUMOF ARRAY_SIZE(uart_config)
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/** @} */
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/**
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* @name I2C configuration
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* @{
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*/
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static const i2c_conf_t i2c_config[] = {
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{
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.dev = I2C1,
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.speed = I2C_SPEED_NORMAL,
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.scl_pin = GPIO_PIN(PORT_B, 8),
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.sda_pin = GPIO_PIN(PORT_B, 7),
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.scl_af = GPIO_AF4,
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.sda_af = GPIO_AF4,
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.bus = APB1,
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.rcc_mask = RCC_APB1ENR1_I2C1EN,
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.rcc_sw_mask = RCC_CCIPR_I2C1SEL_1, /* HSI (16 MHz) */
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.irqn = I2C1_ER_IRQn
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},
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};
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#define I2C_0_ISR isr_i2c1_er
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#define I2C_NUMOF ARRAY_SIZE(i2c_config)
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/** @} */
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/**
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* @name SPI configuration
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* @{
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*/
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static const spi_conf_t spi_config[] = {
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{
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.dev = SPI1,
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.mosi_pin = GPIO_PIN(PORT_B, 5),
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.miso_pin = GPIO_PIN(PORT_B, 4),
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.sclk_pin = GPIO_PIN(PORT_A, 5),
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.cs_pin = SPI_CS_UNDEF,
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.mosi_af = GPIO_AF5,
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.miso_af = GPIO_AF5,
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.sclk_af = GPIO_AF5,
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.cs_af = GPIO_AF5,
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.rccmask = RCC_APB2ENR_SPI1EN,
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.apbbus = APB2
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}
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};
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#define SPI_NUMOF ARRAY_SIZE(spi_config)
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/** @} */
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#ifdef __cplusplus
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}
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#endif
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#endif /* PERIPH_CONF_H */
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/** @} */
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