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66 lines
2.8 KiB
C
66 lines
2.8 KiB
C
/** xtensa_ops.h
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*
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* Special macros/etc which deal with Xtensa-specific architecture/CPU
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* considerations.
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*
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* Part of esp-open-rtos
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* Copyright (C) 2015 Superhouse Automation Pty Ltd
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* BSD Licensed as described in the file LICENSE
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*/
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/*
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Copyright (c) 2015, SuperHouse Automation Pty Ltd
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All rights reserved.
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Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met:
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1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following disclaimer.
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2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the following disclaimer in the documentation and/or other materials provided with the distribution.
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3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote products derived from this software without specific prior written permission.
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef XTENSA_OPS_H
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#define XTENSA_OPS_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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/* Read stack pointer to variable.
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*
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* Note that the compiler will push a stack frame (minimum 16 bytes)
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* in the prelude of a C function that calls any other functions.
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*/
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#define SP(var) __asm__ volatile ("mov %0, a1" : "=r" (var))
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/* Read the function return address to a variable.
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*
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* Depends on the containing function being simple enough that a0 is
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* being used as a working register.
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*/
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#define RETADDR(var) __asm__ volatile ("mov %0, a0" : "=r" (var))
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// GCC macros for reading, writing, and exchanging Xtensa processor special
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// registers:
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#define RSR(var, reg) __asm__ volatile ("rsr %0, " #reg : "=r" (var));
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#define WSR(var, reg) __asm__ volatile ("wsr %0, " #reg : : "r" (var));
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#define XSR(var, reg) __asm__ volatile ("xsr %0, " #reg : "+r" (var));
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// GCC macros for performing associated "*sync" opcodes
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#define ISYNC() __asm__ volatile ( "isync" )
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#define RSYNC() __asm__ volatile ( "rsync" )
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#define ESYNC() __asm__ volatile ( "esync" )
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#define DSYNC() __asm__ volatile ( "dsync" )
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#ifdef __cplusplus
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}
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#endif
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#endif /* XTENSA_OPS_H */
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