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128 lines
3.4 KiB
C
128 lines
3.4 KiB
C
/*
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* Copyright (C) 2016 Freie Universität Berlin
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* 2017 OTA keys S.A.
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*
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* This file is subject to the terms and conditions of the GNU Lesser
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* General Public License v2.1. See the file LICENSE in the top level
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* directory for more details.
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*/
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/**
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* @ingroup cpu_stm32
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* @{
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*
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* @file
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* @brief SPI CPU specific definitions for the STM32 family
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*
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* @author Hauke Petersen <hauke.petersen@fu-berlin.de>
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* @author Vincent Dupont <vincent@otakeys.com>
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*/
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#ifndef PERIPH_CPU_SPI_H
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#define PERIPH_CPU_SPI_H
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#include <stdint.h>
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#include "cpu.h"
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#include "macros/units.h"
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#include "periph/cpu_dma.h"
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#include "periph/cpu_gpio.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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/**
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* @brief Define a magic number that tells us to use hardware chip select
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*
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* We use a random value here, that does clearly differentiate from any possible
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* GPIO_PIN(x) value.
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*/
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#define SPI_HWCS_MASK (0xffffff00)
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/**
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* @brief Override the default SPI hardware chip select access macro
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*
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* Since the CPU does only support one single hardware chip select line, we can
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* detect the usage of non-valid lines by comparing to SPI_HWCS_VALID.
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*/
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#define SPI_HWCS(x) (SPI_HWCS_MASK | x)
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/**
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* @brief Define value for unused CS line
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*/
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#define SPI_CS_UNDEF (GPIO_UNDEF)
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#ifndef DOXYGEN
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/**
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* @brief Overwrite the default spi_cs_t type definition
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* @{
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*/
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#define HAVE_SPI_CS_T
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typedef uint32_t spi_cs_t;
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/** @} */
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#endif
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/**
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* @brief Use the shared SPI functions
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* @{
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*/
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/** Use transfer byte function from periph common */
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#define PERIPH_SPI_NEEDS_TRANSFER_BYTE
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/** Use transfer reg function from periph common */
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#define PERIPH_SPI_NEEDS_TRANSFER_REG
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/** Use transfer regs function from periph common */
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#define PERIPH_SPI_NEEDS_TRANSFER_REGS
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/** @} */
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/**
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* @brief Override SPI clock speed values
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* @{
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*/
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#define HAVE_SPI_CLK_T
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enum {
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SPI_CLK_100KHZ = KHZ(100), /**< drive the SPI bus with 100KHz */
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SPI_CLK_400KHZ = KHZ(400), /**< drive the SPI bus with 400KHz */
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SPI_CLK_1MHZ = MHZ(1), /**< drive the SPI bus with 1MHz */
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SPI_CLK_5MHZ = MHZ(5), /**< drive the SPI bus with 5MHz */
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SPI_CLK_10MHZ = MHZ(10), /**< drive the SPI bus with 10MHz */
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};
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/**
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* @brief SPI clock type
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*/
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typedef uint32_t spi_clk_t;
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/** @} */
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/**
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* @brief Structure for SPI configuration data
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*/
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typedef struct {
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SPI_TypeDef *dev; /**< SPI device base register address */
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gpio_t mosi_pin; /**< MOSI pin */
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gpio_t miso_pin; /**< MISO pin */
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gpio_t sclk_pin; /**< SCLK pin */
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spi_cs_t cs_pin; /**< HWCS pin, set to SPI_CS_UNDEF if not mapped */
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#ifndef CPU_FAM_STM32F1
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gpio_af_t mosi_af; /**< MOSI pin alternate function */
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gpio_af_t miso_af; /**< MISO pin alternate function */
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gpio_af_t sclk_af; /**< SCLK pin alternate function */
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gpio_af_t cs_af; /**< HWCS pin alternate function */
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#endif
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uint32_t rccmask; /**< bit in the RCC peripheral enable register */
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uint8_t apbbus; /**< APBx bus the device is connected to */
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#ifdef MODULE_PERIPH_DMA
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dma_t tx_dma; /**< Logical DMA stream used for TX */
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uint8_t tx_dma_chan; /**< DMA channel used for TX */
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dma_t rx_dma; /**< Logical DMA stream used for RX */
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uint8_t rx_dma_chan; /**< DMA channel used for RX */
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#endif
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} spi_conf_t;
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#ifdef __cplusplus
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}
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#endif
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#endif /* PERIPH_CPU_SPI_H */
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/** @} */
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