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https://github.com/RIOT-OS/RIOT.git
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119 lines
3.9 KiB
C
119 lines
3.9 KiB
C
/*
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* Copyright (C) 2015-2016 Freie Universität Berlin
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*
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* This file is subject to the terms and conditions of the GNU Lesser
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* General Public License v2.1. See the file LICENSE in the top level
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* directory for more details.
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*/
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/**
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* @ingroup cpu_saml21
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* @brief CPU specific definitions for internal peripheral handling
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* @{
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*
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* @file
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* @brief CPU specific definitions for internal peripheral handling
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*
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* @author Hauke Petersen <hauke.petersen@fu-berlin.de>
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*/
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#ifndef PERIPH_CPU_H
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#define PERIPH_CPU_H
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#include "periph_cpu_common.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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/**
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* @brief The Low Power SRAM is not retained during deep sleep.
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*/
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#define CPU_BACKUP_RAM_NOT_RETAINED (1)
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/**
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* @name Power mode configuration
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* @{
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*/
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#define PM_NUM_MODES (2)
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/** @} */
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/**
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* @name SAML21 GCLK definitions
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* @{
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*/
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enum {
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SAM0_GCLK_MAIN = 0, /**< Main clock */
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SAM0_GCLK_TIMER = 1, /**< 4/8MHz clock for timers */
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SAM0_GCLK_32KHZ = 2, /**< 32 kHz clock */
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SAM0_GCLK_48MHZ = 3, /**< 48MHz clock */
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};
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/** @} */
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#ifndef DOXYGEN
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#define HAVE_ADC_RES_T
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typedef enum {
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ADC_RES_6BIT = 0xff, /**< not supported */
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ADC_RES_8BIT = ADC_CTRLC_RESSEL_8BIT, /**< ADC resolution: 8 bit */
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ADC_RES_10BIT = ADC_CTRLC_RESSEL_10BIT, /**< ADC resolution: 10 bit */
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ADC_RES_12BIT = ADC_CTRLC_RESSEL_12BIT, /**< ADC resolution: 12 bit */
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ADC_RES_14BIT = 0xfe, /**< not supported */
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ADC_RES_16BIT = 0xfd /**< not supported */
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} adc_res_t;
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#endif /* ndef DOXYGEN */
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/**
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* @brief The MCU has a 12 bit DAC
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*/
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#define DAC_RES_BITS (12)
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/**
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* @brief The MCU has two DAC outputs.
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*/
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#define DAC_NUMOF (2)
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/**
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* @name Real time counter configuration
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* @{
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*/
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#define RTT_MAX_VALUE (0xffffffff)
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#define RTT_CLOCK_FREQUENCY (32768U) /* in Hz */
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#define RTT_MIN_FREQUENCY (RTT_CLOCK_FREQUENCY / 512U) /* in Hz */
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#define RTT_MAX_FREQUENCY (RTT_CLOCK_FREQUENCY) /* in Hz */
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/* determined by tests/ztimer_underflow */
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#define RTT_MIN_OFFSET (8U)
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/** @} */
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/**
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* @brief NVM User Row Mapping - Dedicated Entries
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* Config values will be applied at power-on.
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* @{
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*/
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struct sam0_aux_cfg_mapping {
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uint64_t bootloader_size : 3; /**< BOOTPROT: Bootloader Size */
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uint64_t reserved_0 : 1; /**< Factory settings - do not change. */
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uint64_t eeprom_size : 3; /**< one of eight different EEPROM sizes */
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uint64_t reserved_1 : 1; /**< Factory settings - do not change. */
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uint64_t bod33_level : 6; /**< BOD33 threshold level at power-on. */
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uint64_t bod33_enable : 1; /**< BOD33 Enable at power-on. */
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uint64_t bod33_action : 2; /**< BOD33 Action at power-on. */
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uint64_t reserved_2 : 9; /**< Factory settings - do not change. */
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uint64_t wdt_enable : 1; /**< WDT Enable at power-on. */
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uint64_t wdt_always_on : 1; /**< WDT Always-On at power-on. */
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uint64_t wdt_period : 4; /**< WDT Period at power-on. */
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uint64_t wdt_window : 4; /**< WDT Window at power-on. */
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uint64_t wdt_ewoffset : 4; /**< WDT Early Warning Interrupt Offset */
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uint64_t wdt_window_enable : 1; /**< WDT Window mode enabled on power-on */
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uint64_t bod33_hysteresis : 1; /**< BOD33 Hysteresis configuration */
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uint64_t reserved_3 : 6; /**< Factory settings - do not change. */
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uint64_t nvm_locks : 16; /**< NVM Region Lock Bits. */
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};
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/** @} */
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#ifdef __cplusplus
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}
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#endif
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#endif /* PERIPH_CPU_H */
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/** @} */
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