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RIOT/cpu/cortex-m3_common
Hauke Petersen e7fbaf3815 cpu: removed NAKED attribute from ISRs
- removed the __attribute__((naked)) from ISRs
- removed ISR_ENTER() and ISR_EXIT() macros

Rationale: Cortex-Mx MCUs save registers R0-R4 automatically
on calling ISRs. The naked attribute tells the compiler not
to save any other registers. This is fine, as long as the
code in the ISR is not nested. If nested, it will use also
R4 and R5, which will then lead to currupted registers on
exit of the ISR. Removing the naked will fix this.
2014-10-30 19:33:32 +01:00
..
include cpu: removed NAKED attribute from ISRs 2014-10-30 19:33:32 +01:00
atomic_arch.c doc: use lgplv2.1-short license header instead of lgpl-short-riot 2014-07-31 22:57:20 +02:00
crash.c cpu - cortex-m3: moved crash.c to cortex-m3_common 2014-06-18 11:49:45 +02:00
doc.txt doc: fix naming for Cortex M3 common group 2014-10-23 20:53:00 +02:00
irq_arch.c doc: use lgplv2.1-short license header instead of lgpl-short-riot 2014-07-31 22:57:20 +02:00
Makefile make: detect their module name automatically 2014-06-17 15:49:32 +02:00
Makefile.include cpu: renamed cortexm_common->cortex-m3_common and cleanup 2014-06-11 00:24:10 +02:00
thread_arch.c cpu: use typed function pointer for thread_arch_init 2014-10-23 18:26:21 +02:00