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43 lines
1.4 KiB
Makefile
43 lines
1.4 KiB
Makefile
BOARD ?= nucleo-f767zi
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# Custom per-board pin configuration (e.g. for setting PORT_IN, PIN_IN_0, ...)
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# can be provided in a Makefile.$(BOARD) file:
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-include Makefile.$(BOARD)
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# Choose two output pins that do not conflict with stdio and are not connected
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# to external devices such as sensors, network devices, etc.
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#
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# Beware: If other pins on the output port are configured as output GPIOs, they
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# might be written to during this test.
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PORT_OUT ?= 0
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PIN_OUT_0 ?= 0
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PIN_OUT_1 ?= 1
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include ../Makefile.bench_common
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FEATURES_REQUIRED += periph_gpio_ll
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FEATURES_REQUIRED += periph_gpio
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FEATURES_OPTIONAL += periph_gpio_ll_irq
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FEATURES_OPTIONAL += periph_gpio_ll_irq_level_triggered_high
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FEATURES_OPTIONAL += periph_gpio_ll_irq_level_triggered_low
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USEMODULE += ztimer_usec
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include $(RIOTBASE)/Makefile.include
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# Configure if compensation of loop overhead in the estimation of the
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# toggling speed should be performed. Default: Do so, except for Cortex-M7.
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# For the Cortex-M7 the loop instructions are emitted together with the GPIO
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# writes due to the dual issue feature. Hence, there is no loop overhead for
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# Cortex-M7 to compensate for.
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ifeq (cortex-m7,$(CPU_CORE))
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COMPENSATE_OVERHEAD ?= 0
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endif
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COMPENSATE_OVERHEAD ?= 1
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CFLAGS += -DPORT_OUT=$(PORT_OUT)
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CFLAGS += -DPIN_OUT_0=$(PIN_OUT_0)
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CFLAGS += -DPIN_OUT_1=$(PIN_OUT_1)
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CFLAGS += -DCOMPENSATE_OVERHEAD=$(COMPENSATE_OVERHEAD)
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