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188 lines
7.1 KiB
C
188 lines
7.1 KiB
C
/*
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* Copyright (C) 2015-2018 Freie Universität Berlin
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*
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* This file is subject to the terms and conditions of the GNU Lesser
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* General Public License v2.1. See the file LICENSE in the top level
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* directory for more details.
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*/
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/**
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* @ingroup cpu_efr32zg23
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* @{
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*
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* @file
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* @brief Startup code and interrupt vector definition
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*
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* @author Hauke Petersen <hauke.petersen@fu-berlin.de>
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* @author Bas Stottelaar <basstottelaar@gmail.com>
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*
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* @}
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*/
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#include "vectors_cortexm.h"
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/* define a local dummy handler as it needs to be in the same compilation unit
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* as the alias definition */
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void dummy_handler(void)
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{
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dummy_handler_default();
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}
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/* Silicon Labs specific interrupt vector */
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WEAK_DEFAULT void isr_smu_secure(void);
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WEAK_DEFAULT void isr_smu_s_privileged(void);
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WEAK_DEFAULT void isr_smu_ns_privileged(void);
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WEAK_DEFAULT void isr_emu(void);
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WEAK_DEFAULT void isr_timer0(void);
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WEAK_DEFAULT void isr_timer1(void);
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WEAK_DEFAULT void isr_timer2(void);
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WEAK_DEFAULT void isr_timer3(void);
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WEAK_DEFAULT void isr_timer4(void);
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WEAK_DEFAULT void isr_usart0_rx(void);
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WEAK_DEFAULT void isr_usart0_tx(void);
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WEAK_DEFAULT void isr_eusart0_rx(void);
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WEAK_DEFAULT void isr_eusart0_tx(void);
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WEAK_DEFAULT void isr_eusart1_rx(void);
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WEAK_DEFAULT void isr_eusart1_tx(void);
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WEAK_DEFAULT void isr_eusart2_rx(void);
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WEAK_DEFAULT void isr_eusart2_tx(void);
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WEAK_DEFAULT void isr_icache0(void);
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WEAK_DEFAULT void isr_burtc(void);
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WEAK_DEFAULT void isr_letimer0(void);
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WEAK_DEFAULT void isr_syscfg(void);
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WEAK_DEFAULT void isr_mpahbram(void);
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WEAK_DEFAULT void isr_ldma(void);
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WEAK_DEFAULT void isr_lfxo(void);
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WEAK_DEFAULT void isr_lfrco(void);
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WEAK_DEFAULT void isr_ulfrco(void);
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WEAK_DEFAULT void isr_gpio_odd(void);
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WEAK_DEFAULT void isr_gpio_even(void);
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WEAK_DEFAULT void isr_i2c0(void);
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WEAK_DEFAULT void isr_i2c1(void);
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WEAK_DEFAULT void isr_emudg(void);
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WEAK_DEFAULT void isr_agc(void);
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WEAK_DEFAULT void isr_bufc(void);
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WEAK_DEFAULT void isr_frc_pri(void);
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WEAK_DEFAULT void isr_frc(void);
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WEAK_DEFAULT void isr_modem(void);
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WEAK_DEFAULT void isr_protimer(void);
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WEAK_DEFAULT void isr_rac_rsm(void);
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WEAK_DEFAULT void isr_rac_seq(void);
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WEAK_DEFAULT void isr_hostmailbox(void);
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WEAK_DEFAULT void isr_synth(void);
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WEAK_DEFAULT void isr_acmp0(void);
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WEAK_DEFAULT void isr_acmp1(void);
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WEAK_DEFAULT void isr_wdog0(void);
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WEAK_DEFAULT void isr_wdog1(void);
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WEAK_DEFAULT void isr_hfxo0(void);
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WEAK_DEFAULT void isr_hfrco0(void);
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WEAK_DEFAULT void isr_hfrcoem23(void);
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WEAK_DEFAULT void isr_cmu(void);
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WEAK_DEFAULT void isr_aes(void);
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WEAK_DEFAULT void isr_iadc(void);
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WEAK_DEFAULT void isr_msc(void);
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WEAK_DEFAULT void isr_dpll0(void);
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WEAK_DEFAULT void isr_emuefp(void);
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WEAK_DEFAULT void isr_dcdc(void);
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WEAK_DEFAULT void isr_vdac(void);
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WEAK_DEFAULT void isr_pcnt0(void);
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WEAK_DEFAULT void isr_sw0(void);
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WEAK_DEFAULT void isr_sw1(void);
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WEAK_DEFAULT void isr_sw2(void);
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WEAK_DEFAULT void isr_sw3(void);
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WEAK_DEFAULT void isr_kernel0(void);
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WEAK_DEFAULT void isr_kernel1(void);
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WEAK_DEFAULT void isr_m33cti0(void);
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WEAK_DEFAULT void isr_m33cti1(void);
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WEAK_DEFAULT void isr_fpuexh(void);
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WEAK_DEFAULT void isr_setamperhost(void);
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WEAK_DEFAULT void isr_sembrx(void);
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WEAK_DEFAULT void isr_sembtx(void);
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WEAK_DEFAULT void isr_lesense(void);
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WEAK_DEFAULT void isr_sysrtc_app(void);
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WEAK_DEFAULT void isr_sysrtc_seq(void);
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WEAK_DEFAULT void isr_lcd(void);
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WEAK_DEFAULT void isr_keyscan(void);
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WEAK_DEFAULT void isr_rfeca0(void);
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WEAK_DEFAULT void isr_rfeca1(void);
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/* interrupt vector table */
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ISR_VECTOR(1) const isr_t vector_cpu[CPU_IRQ_NUMOF] = {
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[ 0] = isr_smu_secure, /* SMU_SECURE */
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[ 1] = isr_smu_s_privileged, /* SMU_S_PRIVILEGED */
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[ 2] = isr_smu_ns_privileged, /* SMU_NS_PRIVILEGED */
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[ 3] = isr_emu, /* EMU */
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[ 4] = isr_timer0, /* TIMER0 */
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[ 5] = isr_timer1, /* TIMER1 */
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[ 6] = isr_timer2, /* TIMER2 */
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[ 7] = isr_timer3, /* TIMER3 */
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[ 8] = isr_timer4, /* TIMER4 */
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[ 9] = isr_usart0_rx, /* USART0_RX */
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[10] = isr_usart0_tx, /* USART0_TX */
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[11] = isr_eusart0_rx, /* EUSART0_RX */
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[12] = isr_eusart0_tx, /* EUSART0_TX */
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[13] = isr_eusart1_rx, /* EUSART1_RX */
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[14] = isr_eusart1_tx, /* EUSART1_TX */
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[15] = isr_eusart2_rx, /* EUSART2_RX */
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[16] = isr_eusart2_tx, /* EUSART2_TX */
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[17] = isr_icache0, /* ICACHE0 */
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[18] = isr_burtc, /* BURTC */
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[19] = isr_letimer0, /* LETIMER0 */
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[20] = isr_syscfg, /* SYSCFG */
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[21] = isr_mpahbram, /* MPAHBRAM */
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[22] = isr_ldma, /* LDMA */
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[23] = isr_lfxo, /* LFXO */
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[24] = isr_lfrco, /* LFRCO */
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[25] = isr_ulfrco, /* ULFRCO */
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[26] = isr_gpio_odd, /* GPIO_ODD */
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[27] = isr_gpio_even, /* GPIO_EVEN */
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[28] = isr_i2c0, /* I2C0 */
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[29] = isr_i2c1, /* I2C1 */
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[30] = isr_emudg, /* EMUDG */
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[31] = isr_agc, /* AGC */
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[32] = isr_bufc, /* BUFC */
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[33] = isr_frc_pri, /* FRC_PRI */
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[34] = isr_frc, /* FRC */
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[35] = isr_modem, /* MODEM */
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[36] = isr_protimer, /* PROTIMER */
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[37] = isr_rac_rsm, /* RAC_RSM */
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[38] = isr_rac_seq, /* RAC_SEQ */
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[39] = isr_hostmailbox, /* HOSTMAILBOX */
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[40] = isr_synth, /* SYNTH */
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[41] = isr_acmp0, /* ACMP0 */
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[42] = isr_acmp1, /* ACMP1 */
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[43] = isr_wdog0, /* WDOG0 */
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[44] = isr_wdog1, /* WDOG1 */
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[45] = isr_hfxo0, /* HFXO0 */
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[46] = isr_hfrco0, /* HFRCO0 */
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[47] = isr_hfrcoem23, /* HFRCOEM23 */
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[48] = isr_cmu, /* CMU */
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[49] = isr_aes, /* AES */
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[50] = isr_iadc, /* IADC */
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[51] = isr_msc, /* MSC */
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[52] = isr_dpll0, /* DPLL0 */
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[53] = isr_emuefp, /* EMUEFP */
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[54] = isr_dcdc, /* DCDC */
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[55] = isr_vdac, /* VDAC */
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[56] = isr_pcnt0, /* PCNT0 */
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[57] = isr_sw0, /* SW0 */
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[58] = isr_sw1, /* SW1 */
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[59] = isr_sw2, /* SW2 */
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[60] = isr_sw3, /* SW3 */
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[61] = isr_kernel0, /* KERNEL0 */
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[62] = isr_kernel1, /* KERNEL1 */
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[63] = isr_m33cti0, /* M33CTI0 */
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[64] = isr_m33cti1, /* M33CTI1 */
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[65] = isr_fpuexh, /* FPUEXH */
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[66] = isr_setamperhost, /* SETAMPERHOST */
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[67] = isr_sembrx, /* SEMBRX */
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[68] = isr_sembtx, /* SEMBTX */
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[69] = isr_lesense, /* LESENSE */
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[70] = isr_sysrtc_app, /* SYSRTC_APP */
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[71] = isr_sysrtc_seq, /* SYSRTC_SEQ */
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[72] = isr_lcd, /* LCD */
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[73] = isr_keyscan, /* KEYSCAN */
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[74] = isr_rfeca0, /* RFECA0 */
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[75] = isr_rfeca1, /* RFECA1 */
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};
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