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RIOT/chronos/drivers/cc430-cc110x.c
Oliver Hahm b01b1e8e2f [board/chronos board/msb-430h board/msba2-common drivers/cc110x_ng sys/shell
sys/transceiver]
* renamed all occurrences of cc1100 to cc110x as in fact all driver parts should
work for cc1100 and cc110x as well

[driver/cc110x_ng]
* added some documentation
* introduced a new register function to access rxfifo (fixing the of-by-one
problem on chronos platform
2010-12-11 12:09:20 +01:00

82 lines
1.7 KiB
C

#include <stdint.h>
#include <cpu.h>
#include <irq.h>
#include <cc110x_ng.h>
#include <cc110x-arch.h>
//#include <cc430_.h>
#include <cc430x613x.h>
//#include <msp430/rf1a.h>
#define CC1100_GDO0 (RF1AIN & BIT0)
#define CC1100_GDO1 (RF1AIN & BIT1)
#define CC1100_GDO2 (RF1AIN & BIT2)
int cc110x_get_gdo0(void) {
return CC1100_GDO0;
}
int cc110x_get_gdo1(void) {
return CC1100_GDO1;
}
int cc110x_get_gdo2(void) {
return CC1100_GDO2;
}
void cc110x_before_send(void)
{
// Disable GDO2 interrupt before sending packet
cc110x_gdo2_disable();
}
void cc110x_after_send(void)
{
// Enable GDO2 interrupt after sending packet
cc110x_gdo2_enable();
}
void cc110x_gdo0_enable(void) {
RF1AIFG &= ~BIT0;
RF1AIE |= BIT0;
}
void cc110x_gdo0_disable(void) {
RF1AIE &= ~BIT0;
RF1AIFG &= ~BIT0;
}
void cc110x_gdo2_disable(void) {
RF1AIFG &= ~BIT2; // Clear a pending interrupt
RF1AIE &= ~BIT2; // Disable the interrupt
}
void cc110x_gdo2_enable(void) {
RF1AIFG &= ~BIT2; // Clear a pending interrupt
RF1AIE |= BIT2; // Enable the interrupt
}
void cc110x_init_interrupts(void) {
uint8_t state = disableIRQ(); /* Disable all interrupts */
cc110x_gdo2_enable();
cc110x_gdo0_disable();
restoreIRQ(state); /* Enable all interrupts */
}
interrupt (CC1101_VECTOR) __attribute__ ((naked)) cc110x_isr(void){
__enter_isr();
/* Check IFG */
if (RF1AIV == RF1AIV_RFIFG2) {
while (RF1AIN & BIT2);
/* discard all further interrupts */
RF1AIV = 0;
cc110x_gdo2_irq();
}
if (RF1AIV == RF1AIV_RFIFG0) {
cc110x_gdo0_irq();
RF1AIE &= ~BIT0;
}
__exit_isr();
}