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https://github.com/RIOT-OS/RIOT.git
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b01b1e8e2f
sys/transceiver] * renamed all occurrences of cc1100 to cc110x as in fact all driver parts should work for cc1100 and cc110x as well [driver/cc110x_ng] * added some documentation * introduced a new register function to access rxfifo (fixing the of-by-one problem on chronos platform
82 lines
1.7 KiB
C
82 lines
1.7 KiB
C
#include <stdint.h>
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#include <cpu.h>
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#include <irq.h>
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#include <cc110x_ng.h>
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#include <cc110x-arch.h>
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//#include <cc430_.h>
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#include <cc430x613x.h>
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//#include <msp430/rf1a.h>
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#define CC1100_GDO0 (RF1AIN & BIT0)
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#define CC1100_GDO1 (RF1AIN & BIT1)
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#define CC1100_GDO2 (RF1AIN & BIT2)
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int cc110x_get_gdo0(void) {
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return CC1100_GDO0;
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}
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int cc110x_get_gdo1(void) {
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return CC1100_GDO1;
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}
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int cc110x_get_gdo2(void) {
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return CC1100_GDO2;
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}
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void cc110x_before_send(void)
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{
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// Disable GDO2 interrupt before sending packet
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cc110x_gdo2_disable();
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}
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void cc110x_after_send(void)
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{
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// Enable GDO2 interrupt after sending packet
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cc110x_gdo2_enable();
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}
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void cc110x_gdo0_enable(void) {
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RF1AIFG &= ~BIT0;
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RF1AIE |= BIT0;
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}
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void cc110x_gdo0_disable(void) {
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RF1AIE &= ~BIT0;
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RF1AIFG &= ~BIT0;
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}
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void cc110x_gdo2_disable(void) {
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RF1AIFG &= ~BIT2; // Clear a pending interrupt
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RF1AIE &= ~BIT2; // Disable the interrupt
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}
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void cc110x_gdo2_enable(void) {
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RF1AIFG &= ~BIT2; // Clear a pending interrupt
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RF1AIE |= BIT2; // Enable the interrupt
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}
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void cc110x_init_interrupts(void) {
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uint8_t state = disableIRQ(); /* Disable all interrupts */
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cc110x_gdo2_enable();
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cc110x_gdo0_disable();
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restoreIRQ(state); /* Enable all interrupts */
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}
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interrupt (CC1101_VECTOR) __attribute__ ((naked)) cc110x_isr(void){
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__enter_isr();
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/* Check IFG */
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if (RF1AIV == RF1AIV_RFIFG2) {
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while (RF1AIN & BIT2);
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/* discard all further interrupts */
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RF1AIV = 0;
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cc110x_gdo2_irq();
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}
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if (RF1AIV == RF1AIV_RFIFG0) {
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cc110x_gdo0_irq();
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RF1AIE &= ~BIT0;
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}
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__exit_isr();
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}
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