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[board/chronos board/msb-430h board/msba2-common drivers/cc110x_ng sys/shell

sys/transceiver]
* renamed all occurrences of cc1100 to cc110x as in fact all driver parts should
work for cc1100 and cc110x as well

[driver/cc110x_ng]
* added some documentation
* introduced a new register function to access rxfifo (fixing the of-by-one
problem on chronos platform
This commit is contained in:
Oliver Hahm 2010-12-11 12:09:20 +01:00
parent 31f6c17606
commit b01b1e8e2f
6 changed files with 89 additions and 88 deletions

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@ -1,4 +1,4 @@
SubDir TOP board chronos drivers ;
Module board_display : display.c display1.c ;
Module board_cc1100 : cc430-cc1100.c : cc110x_cc430 ;
Module board_cc110x : cc430-cc110x.c : cc110x_cc430 ;

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@ -2,78 +2,79 @@
#include <cpu.h>
#include <irq.h>
#include <cc1100_ng.h>
#include <arch_cc1100.h>
#include <cc110x_ng.h>
#include <cc110x-arch.h>
#include <cc430_.h>
#include <msp430/rf1a.h>
//#include <cc430_.h>
#include <cc430x613x.h>
//#include <msp430/rf1a.h>
#define CC1100_GDO0 (RF1AIN & BIT0)
#define CC1100_GDO1 (RF1AIN & BIT1)
#define CC1100_GDO2 (RF1AIN & BIT2)
int cc1100_get_gdo0(void) {
int cc110x_get_gdo0(void) {
return CC1100_GDO0;
}
int cc1100_get_gdo1(void) {
int cc110x_get_gdo1(void) {
return CC1100_GDO1;
}
int cc1100_get_gdo2(void) {
int cc110x_get_gdo2(void) {
return CC1100_GDO2;
}
void cc1100_before_send(void)
void cc110x_before_send(void)
{
// Disable GDO2 interrupt before sending packet
cc1100_gdo2_disable();
cc110x_gdo2_disable();
}
void cc1100_after_send(void)
void cc110x_after_send(void)
{
// Enable GDO2 interrupt after sending packet
cc1100_gdo2_enable();
cc110x_gdo2_enable();
}
void cc1100_gdo0_enable(void) {
void cc110x_gdo0_enable(void) {
RF1AIFG &= ~BIT0;
RF1AIE |= BIT0;
}
void cc1100_gdo0_disable(void) {
void cc110x_gdo0_disable(void) {
RF1AIE &= ~BIT0;
RF1AIFG &= ~BIT0;
}
void cc1100_gdo2_disable(void) {
void cc110x_gdo2_disable(void) {
RF1AIFG &= ~BIT2; // Clear a pending interrupt
RF1AIE &= ~BIT2; // Disable the interrupt
}
void cc1100_gdo2_enable(void) {
void cc110x_gdo2_enable(void) {
RF1AIFG &= ~BIT2; // Clear a pending interrupt
RF1AIE |= BIT2; // Enable the interrupt
}
void cc1100_init_interrupts(void) {
void cc110x_init_interrupts(void) {
uint8_t state = disableIRQ(); /* Disable all interrupts */
cc1100_gdo2_enable();
cc1100_gdo0_disable();
cc110x_gdo2_enable();
cc110x_gdo0_disable();
restoreIRQ(state); /* Enable all interrupts */
}
interrupt (CC1101_VECTOR) __attribute__ ((naked)) cc1100_isr(void){
interrupt (CC1101_VECTOR) __attribute__ ((naked)) cc110x_isr(void){
__enter_isr();
/* Check IFG */
if (RF1AIV == RF1AIV_RFIFG2) {
while (RF1AIN & BIT2);
/* discard all further interrupts */
RF1AIV = 0;
cc1100_gdo2_irq();
cc110x_gdo2_irq();
}
if (RF1AIV == RF1AIV_RFIFG0) {
cc1100_gdo0_irq();
cc110x_gdo0_irq();
RF1AIE &= ~BIT0;
}
__exit_isr();

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@ -27,7 +27,7 @@
SubDir TOP board msb-430h ;
Module board_cc1100 : driver_cc1100.c : cc110x_spi ;
Module board_cc110x : driver_cc110x.c : cc110x_spi ;
SubInclude TOP board msb-430-common ;
SubInclude TOP cpu $(CPU) ;

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@ -23,8 +23,8 @@ Boston, MA 02111-1307, USA. */
#include <cpu.h>
#include <irq.h>
#include <cc1100_ng.h>
#include <arch_cc1100.h>
#include <cc110x_ng.h>
#include <arch_cc110x.h>
#define CC1100_GDO0 (P2IN & 0x02) // read serial I/O (GDO0)
#define CC1100_GDO1 (P3IN & 0x04) // read serial I/O (GDO1)
@ -39,61 +39,61 @@ Boston, MA 02111-1307, USA. */
volatile int abort_count;
volatile int retry_count = 0;
void cc1100_gdo0_enable(void)
void cc110x_gdo0_enable(void)
{
P2IFG &= ~0x02; /* Clear IFG for GDO0 */
P2IE |= 0x02; /* Enable interrupt for GDO0 */
}
void cc1100_gdo0_disable(void)
void cc110x_gdo0_disable(void)
{
P2IE &= ~0x02; /* Disable interrupt for GDO0 */
P2IFG &= ~0x02; /* Clear IFG for GDO0 */
}
void cc1100_gdo2_enable(void)
void cc110x_gdo2_enable(void)
{
P2IFG &= ~0x01; /* Clear IFG for GDO2 */
P2IE |= 0x01; /* Enable interrupt for GDO2 */
}
void cc1100_gdo2_disable(void)
void cc110x_gdo2_disable(void)
{
P2IE &= ~0x01; /* Disable interrupt for GDO2 */
P2IFG &= ~0x01; /* Clear IFG for GDO2 */
}
void cc1100_before_send(void)
void cc110x_before_send(void)
{
// Disable GDO2 interrupt before sending packet
cc1100_gdo2_disable();
cc110x_gdo2_disable();
}
void cc1100_after_send(void)
void cc110x_after_send(void)
{
// Enable GDO2 interrupt after sending packet
cc1100_gdo2_enable();
cc110x_gdo2_enable();
}
int cc1100_get_gdo0(void) {
int cc110x_get_gdo0(void) {
return CC1100_GDO0;
}
int cc1100_get_gdo1(void) {
int cc110x_get_gdo1(void) {
return CC1100_GDO1;
}
int cc1100_get_gdo2(void) {
int cc110x_get_gdo2(void) {
return CC1100_GDO2;
}
void cc1100_spi_cs(void)
void cc110x_spi_cs(void)
{
CC1100_CS_LOW;
}
uint8_t cc1100_txrx(uint8_t data)
uint8_t cc110x_txrx(uint8_t data)
{
/* Ensure TX Buf is empty */
long c = 0;
@ -103,20 +103,20 @@ uint8_t cc1100_txrx(uint8_t data)
while(!(IFG1 & UTXIFG0))
{
if (c++ == 1000000)
puts("cc1100_txrx alarm()");
puts("cc110x_txrx alarm()");
}
/* Wait for Byte received */
c = 0;
while(!(IFG1 & URXIFG0))
{
if (c++ == 1000000)
puts("cc1100_txrx alarm()");
puts("cc110x_txrx alarm()");
}
return RXBUF0;
}
void cc1100_spi_select(void)
void cc110x_spi_select(void)
{
// Switch to GDO mode
P3SEL &= ~0x04;
@ -147,11 +147,11 @@ void cc1100_spi_select(void)
P3SEL |= 0x04;
}
void cc1100_spi_unselect(void) {
void cc110x_spi_unselect(void) {
CC1100_CS_HIGH;
}
void cc1100_init_interrupts(void)
void cc110x_init_interrupts(void)
{
unsigned int state = disableIRQ(); /* Disable all interrupts */
P2SEL = 0x00; /* must be <> 1 to use interrupts */
@ -163,7 +163,7 @@ void cc1100_init_interrupts(void)
restoreIRQ(state); /* Enable all interrupts */
}
void cc1100_spi_init(uint8_t clockrate)
void cc110x_spi_init(uint8_t clockrate)
{
// Switch off async UART
while(!(UTCTL0 & TXEPT)); // Wait for empty UxTXBUF register
@ -197,8 +197,8 @@ void cc1100_spi_init(uint8_t clockrate)
// #include <msp430x16x.h>
// #include <signal.h>
// #include "type.h"
// #include "cc1100_defines.h"
// #include "driver_cc1100.h"
// #include "cc110x_defines.h"
// #include "driver_cc110x.h"
// #include "driver_system.h"
// #include "spi0.h"
//
@ -213,17 +213,17 @@ void cc1100_spi_init(uint8_t clockrate)
// // void spiInitTrx(void)
// //
// // DESCRIPTION:
// // This function puts the cc1100 into spi mode. You have to call this bevore every spi transaction.
// // This function puts the cc110x into spi mode. You have to call this bevore every spi transaction.
// //
// //-------------------------------------------------------------------------------------------------------
//
//
// void drivercc1100_spiwriteburstreg(uint8_t addr, unsigned char *buffer, uint8_t count)
// void drivercc110x_spiwriteburstreg(uint8_t addr, unsigned char *buffer, uint8_t count)
// {
// uint8_t i;
// long c;
// drivercc1100_spiinittrx();
// drivercc1100_trxspi(addr | CC1100_WRITE_BURST);
// drivercc110x_spiinittrx();
// drivercc110x_trxspi(addr | CC1100_WRITE_BURST);
// for (i = 0; i < count; i++)
// {
// c = 0;
@ -247,11 +247,11 @@ void cc1100_spi_init(uint8_t clockrate)
// CC1100_CS_HIGH;
// }
//
// void drivercc1100_spireadburstreg(uint8_t addr, char *buffer, uint8_t count)
// void drivercc110x_spireadburstreg(uint8_t addr, char *buffer, uint8_t count)
// {
// uint8_t i;
// drivercc1100_spiinittrx();
// drivercc1100_trxspi(addr | CC1100_READ_BURST);
// drivercc110x_spiinittrx();
// drivercc110x_trxspi(addr | CC1100_READ_BURST);
// for (i = 0; i < count; i++)
// {
// long c = 0;
@ -275,21 +275,21 @@ void cc1100_spi_init(uint8_t clockrate)
// CC1100_CS_HIGH;
// }
//
// void drivercc1100_load(callback_t cs_cb,callback_t paket_cb)
// void drivercc110x_load(callback_t cs_cb,callback_t paket_cb)
// {
// _paket_cb = paket_cb;
// _cs_cb = cs_cb;
// spi0_init(0);
// }
//
// void drivercc1100_aftersend(void)
// void drivercc110x_aftersend(void)
// {
// CLEAR(P2IFG, 0x01);
// SET(P2IE, 0x01); /* Enable interrupts on port 2 pin 0 */
// CLEAR(P4OUT, 0x08); /* Turn off Sending Led*/
// }
//
// void drivercc1100_initinterrupts(void)
// void drivercc110x_initinterrupts(void)
// {
// _DINT(); /* Disable all interrupts */
// P2SEL = 0x00; /* must be <> 1 to use interrupts */
@ -301,7 +301,7 @@ void cc1100_spi_init(uint8_t clockrate)
// _EINT(); /* Enable all interrupts */
// }
//
// void drivercc1100_beforesend(void)
// void drivercc110x_beforesend(void)
// {
// /* Turn on Led while sending paket for debug reasons */
// SET(P4OUT, 0x08);
@ -319,21 +319,21 @@ void cc1100_spi_init(uint8_t clockrate)
/*
* CC1100 receive interrupt
*/
interrupt (PORT2_VECTOR) __attribute__ ((naked)) cc1100_isr(void){
interrupt (PORT2_VECTOR) __attribute__ ((naked)) cc110x_isr(void){
__enter_isr();
puts("cc1100_isr()");
puts("cc110x_isr()");
// if (system_state.POWERDOWN) SPI_INIT; /* Initialize SPI after wakeup */
/* Check IFG */
if ((P2IFG & 0x01) != 0) {
P2IFG &= ~0x01;
cc1100_gdo2_irq();
cc110x_gdo2_irq();
}
else if ((P2IFG & 0x02) != 0) {
cc1100_gdo0_irq();
cc110x_gdo0_irq();
P2IE &= ~0x02; // Disable interrupt for GDO0
P2IFG &= ~0x02; // Clear IFG for GDO0
} else {
puts("cc1100_isr(): unexpected IFG!");
puts("cc110x_isr(): unexpected IFG!");
/* Should not occur - only Port 2 Pin 0 interrupts are enabled */
// CLEAR(P2IFG, 0xFF); /* Clear all flags */
}

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@ -1,6 +1,6 @@
SubDir TOP board msba2-common drivers ;
Module board_cc1100 : msba2-cc1100.c : cc110x_spi gpioint ;
Module board_cc110x : msba2-cc110x.c : cc110x_spi gpioint ;
Module board_ltc4150 : msba2-ltc4150.c : gpioint ;
Module board_uart : msba2-uart0.c : chardev_thread ringbuffer ;

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@ -34,7 +34,7 @@ and the mailinglist (subscription via web site)
* @author Thomas Hillebrandt <hillebra@inf.fu-berlin.de>
* @version $Revision: 1781 $
*
* @note $Id: msba2-cc1100.c 1781 2010-01-26 13:39:36Z hillebra $
* @note $Id: msba2-cc110x.c 1781 2010-01-26 13:39:36Z hillebra $
*/
#include <stdio.h>
@ -43,10 +43,10 @@ and the mailinglist (subscription via web site)
#include <cpu.h>
#include <irq.h>
// sys
#include "cc1100.h"
#include "arch_cc1100.h"
#include "cc1100_spi.h"
#include "gpioint.h"
#include <cc110x_ng.h>
#include <cc110x-arch.h>
#include <cc110x_spi.h>
#include <gpioint.h>
#define CC1100_GDO0 (FIO0PIN & BIT27) // read serial I/O (GDO0)
#define CC1100_GDO1 (FIO1PIN & BIT23) // read serial I/O (GDO1)
@ -82,19 +82,19 @@ static int test_time(int code) {
}
#endif
int cc1100_get_gdo0(void) {
int cc110x_get_gdo0(void) {
return CC1100_GDO0;
}
int cc1100_get_gdo1(void) {
int cc110x_get_gdo1(void) {
return CC1100_GDO1;
}
int cc1100_get_gdo2(void) {
int cc110x_get_gdo2(void) {
return CC1100_GDO2;
}
void cc1100_spi_init(void)
void cc110x_spi_init(void)
{
// configure chip-select
FIO1DIR |= BIT21;
@ -128,7 +128,7 @@ void cc1100_spi_init(void)
}
}
uint8_t cc1100_txrx(uint8_t c) {
uint8_t cc110x_txrx(uint8_t c) {
uint8_t result;
SSP0DR = c;
#ifdef DEBUG
@ -159,13 +159,13 @@ uint8_t cc1100_txrx(uint8_t c) {
return result;
}
void cc1100_spi_cs(void)
void cc110x_spi_cs(void)
{
FIO1CLR = BIT21;
}
void
cc1100_spi_select(void)
cc110x_spi_select(void)
{
volatile int retry_count = 0;
volatile int abort_count;
@ -199,44 +199,44 @@ cc1100_spi_select(void)
}
void
cc1100_spi_unselect(void)
cc110x_spi_unselect(void)
{
FIO1SET = BIT21;
}
void cc1100_before_send(void)
void cc110x_before_send(void)
{
// Disable GDO2 interrupt before sending packet
cc1100_gdo2_disable();
cc110x_gdo2_disable();
}
void cc1100_after_send(void)
void cc110x_after_send(void)
{
// Enable GDO2 interrupt after sending packet
cc1100_gdo2_enable();
cc110x_gdo2_enable();
}
void cc1100_gdo0_enable(void) {
gpioint_set(0, BIT27, GPIOINT_RISING_EDGE, &cc1100_gdo0_irq);
void cc110x_gdo0_enable(void) {
gpioint_set(0, BIT27, GPIOINT_RISING_EDGE, &cc110x_gdo0_irq);
}
void cc1100_gdo0_disable(void) {
void cc110x_gdo0_disable(void) {
gpioint_set(0, BIT27, GPIOINT_DISABLE, NULL);
}
void cc1100_gdo2_disable(void) {
void cc110x_gdo2_disable(void) {
gpioint_set(0, BIT28, GPIOINT_DISABLE, NULL);
}
void cc1100_gdo2_enable(void) {
gpioint_set(0, BIT28, GPIOINT_FALLING_EDGE, &cc1100_gdo2_irq);
void cc110x_gdo2_enable(void) {
gpioint_set(0, BIT28, GPIOINT_FALLING_EDGE, &cc110x_gdo2_irq);
}
void cc1100_init_interrupts(void)
void cc110x_init_interrupts(void)
{
// Enable external interrupt on low edge (for GDO2)
FIO0DIR &= ~BIT28;
cc1100_gdo2_enable();
cc110x_gdo2_enable();
// Enable external interrupt on low edge (for GDO0)
FIO0DIR &= ~BIT27;
}