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5d123cbb22
Also adapt the defines to the documentation - CPUs define up to 4 power modes (from zero, the lowest power mode, to PM_NUM_MODES-1, the highest) - >> there is an implicit extra idle mode (which has the number PM_NUM_MODES) << Previously on saml21 this would always generate pm_set(3) which is an illegal state. Now pm_layered will correctly generate pm_set(2) for IDLE modes. Idle power consumption dropped from 750µA to 368µA and wake-up from standby is also possible. (Before it would just enter STANDBY again as the mode register was never written with the illegal value.)
124 lines
3.2 KiB
C
124 lines
3.2 KiB
C
/*
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* Copyright (C) 2015-2016 Freie Universität Berlin
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*
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* This file is subject to the terms and conditions of the GNU Lesser
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* General Public License v2.1. See the file LICENSE in the top level
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* directory for more details.
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*/
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/**
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* @ingroup cpu_samd21
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* @brief CPU specific definitions for internal peripheral handling
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* @{
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*
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* @file
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* @brief CPU specific definitions for internal peripheral handling
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*
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* @author Hauke Petersen <hauke.petersen@fu-berlin.de>
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*/
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#ifndef PERIPH_CPU_H
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#define PERIPH_CPU_H
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#include <limits.h>
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#include "periph_cpu_common.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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/**
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* @name Power mode configuration
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* @{
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*/
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#define PM_NUM_MODES (3)
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/** @} */
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/**
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* @brief Override the default initial PM blocker
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* @todo Idle modes are enabled by default, deep sleep mode blocked
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*/
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#define PM_BLOCKER_INITIAL 0x00000001
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/**
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* @name SAMD21 sleep modes for PM
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* @{
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*/
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#define SAMD21_PM_STANDBY (0U) /**< Standby mode (stops main clock) */
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#define SAMD21_PM_IDLE_2 (1U) /**< Idle 2 (stops AHB, APB and CPU) */
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#define SAMD21_PM_IDLE_1 (2U) /**< Idle 1 (stops AHB and CPU) */
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#define SAMD21_PM_IDLE_0 (3U) /**< Idle 0 (stops CPU) */
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/** @} */
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/**
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* @name SAMD21 GCLK definitions
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* @{
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*/
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enum {
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SAM0_GCLK_MAIN = 0, /**< 48 MHz main clock */
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SAM0_GCLK_1MHZ, /**< 1 MHz clock for xTimer */
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SAM0_GCLK_32KHZ, /**< 32 kHz clock */
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SAM0_GCLK_1KHZ, /**< 1 kHz clock */
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};
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/** @} */
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/**
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* @brief Override SPI hardware chip select macro
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*
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* As of now, we do not support HW CS, so we always set it to a fixed value
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*/
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#define SPI_HWCS(x) (UINT_MAX - 1)
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/**
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* @brief PWM channel configuration data structure
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*/
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typedef struct {
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gpio_t pin; /**< GPIO pin */
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gpio_mux_t mux; /**< pin function multiplex value */
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uint8_t chan; /**< TCC channel to use */
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} pwm_conf_chan_t;
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/**
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* @brief PWM device configuration data structure
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*/
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typedef struct {
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Tcc *dev; /**< TCC device to use */
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pwm_conf_chan_t chan[3]; /**< channel configuration */
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} pwm_conf_t;
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/**
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* @brief Return the numeric id of a SERCOM device derived from its address
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*
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* @param[in] sercom SERCOM device
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*
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* @return numeric id of the given SERCOM device
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*/
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static inline int _sercom_id(SercomUsart *sercom)
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{
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return ((((uint32_t)sercom) >> 10) & 0x7) - 2;
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}
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#ifndef DOXYGEN
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/**
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* @brief Override the ADC resolution configuration
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* @{
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*/
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#define HAVE_ADC_RES_T
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typedef enum {
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ADC_RES_6BIT = 0xff, /**< not supported */
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ADC_RES_8BIT = ADC_CTRLB_RESSEL_8BIT, /**< ADC resolution: 8 bit */
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ADC_RES_10BIT = ADC_CTRLB_RESSEL_10BIT, /**< ADC resolution: 10 bit */
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ADC_RES_12BIT = ADC_CTRLB_RESSEL_12BIT, /**< ADC resolution: 12 bit */
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ADC_RES_14BIT = 0xfe, /**< not supported */
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ADC_RES_16BIT = 0xfd /**< not supported */
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} adc_res_t;
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/** @} */
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#endif /* ndef DOXYGEN */
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#ifdef __cplusplus
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}
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#endif
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#endif /* PERIPH_CPU_H */
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/** @} */
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