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The Nucleo-F103RB comes with an internal SWD programmer/debugger. Thus, the JTAG pins are not going to be used for debugging / programming anyway. The pins are exposed on the headers, so allowing them to be used as GPIOs make a lot of sense. The Bluepill / Blackpill boards only expose the SWD pins on the debug header, but the JTAG pins (not also used by SWD) are exposed on the GPIO pin headers. Hence, exposing them as regular GPIOs seems to be a reasonable choice.
84 lines
2.5 KiB
C
84 lines
2.5 KiB
C
/*
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* Copyright (C) 2015 TriaGnoSys GmbH
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* 2017 Alexander Kurth, Sören Tempel, Tristan Bruns
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*
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* This file is subject to the terms and conditions of the GNU Lesser
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* General Public License v2.1. See the file LICENSE in the top level
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* directory for more details.
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*/
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/**
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* @ingroup boards_common_blxxxpill
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*
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* @{
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*
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* @file
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* @brief Peripheral MCU configuration for the bluepill/blackpill board
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*
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* @author Víctor Ariño <victor.arino@triagnosys.com>
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* @author Sören Tempel <tempel@uni-bremen.de>
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* @author Tristan Bruns <tbruns@uni-bremen.de>
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* @author Alexander Kurth <kurth1@uni-bremen.de>
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*/
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#ifndef BOARD_COMMON_H
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#define BOARD_COMMON_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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/**
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* @name Macros for controlling the on-board LED.
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* @{
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*/
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#ifndef LED0_PORT
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#define LED0_PORT GPIOC /**< GPIO-Port the LED is connected to */
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#endif
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#ifndef LED0_PORTNUM
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#define LED0_PORTNUM PORT_C /**< GPIO Port number the LED is connected to */
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#endif
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#ifndef LED0_PINNUM
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#define LED0_PINNUM (13) /**< Pin number the LED is connected to */
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#endif
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#define LED0_PIN GPIO_PIN(LED0_PORTNUM, LED0_PINNUM) /**< GPIO-Pin the LED is connected to */
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#define LED0_MASK (1 << LED0_PINNUM)
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#define LED0_ON (LED0_PORT->BSRR = (LED0_MASK << 16)) /**< Turn LED0 on */
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#define LED0_OFF (LED0_PORT->BSRR = LED0_MASK) /**< Turn LED0 off */
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#define LED0_TOGGLE (LED0_PORT->ODR ^= LED0_MASK) /**< Toggle LED0 */
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/** @} */
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/**
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* @brief Initialize board specific hardware, including clock, LEDs and std-IO
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*/
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void board_init(void);
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/**
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* @brief Use the 2nd UART for STDIO on this board
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*/
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#define STDIO_UART_DEV UART_DEV(1)
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/**
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* @name xtimer configuration
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* @{
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*/
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#define XTIMER_WIDTH (16)
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#define XTIMER_BACKOFF (19)
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/** @} */
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/* The boards debug header only exports SWD, so JTAG-only pins PA15, PB3(*),
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* and PB4 can be remapped as regular GPIOs instead. (Note: PB3 is also used as
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* SWO. The user needs to take care to not enable SWO with the debugger while
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* at the same time PB3 is used as GPIO. But RIOT does not use SWO in any case,
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* so if a user adds this feature in her/his own code, she/he should be well
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* aware of this.)
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*/
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#define STM32F1_DISABLE_JTAG /**< Disable JTAG to allow pins being used as GPIOs */
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#ifdef __cplusplus
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}
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#endif
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#endif /* BOARD_COMMON_H */
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/** @} */
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