Gerson Fernando Budke
8c1203c646
cpu/avr8_common: Add xmega reset cause register
...
Add missing ATxmega reset cause register. This shares same definitions
from ATmega CPU.
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
2021-03-15 20:16:10 -03:00
Gerson Fernando Budke
1a88f0bad6
cpu: Introduce Atmel xmega cpu
...
Add ATxmega common files and cpu definitions.
This works was originally developed by @Josar. The 2018 version
were port to 2021 mainline.
This version changes original port to have only the atxmega CPU
definition. With that, all family can be accomodated.
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
2021-03-15 20:16:10 -03:00
Gerson Fernando Budke
d041199825
cpu/avr8_common: Move irq_enable from board to cpu
...
Some mega boards enabling global irq at board_init. This moves that
responsability to cpu/avr8_common to create a common point to all
variants.
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
2021-03-15 20:16:10 -03:00
Gerson Fernando Budke
9081a3b7c7
cpu/avr8_common/include/cpu.h: Increase number of uart
...
The ATxmega can have up to 8 UARTs. This increase from 2 up to 7 to
keep avr8_state flags with 8 bits wide.
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
2021-03-15 20:16:10 -03:00
Leandro Lanzieri
246391a9fa
cpu/nrf52/nrf802154: use driver specific legacy pseudomodule
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This introduces the nrf802154_netdev_legacy pseudomodule that switches
to the netdev-based implementation of the nrf802154 radio driver.
2021-03-10 14:18:12 +01:00
Leandro Lanzieri
f0e7dfdf76
cpu/cc2538/radio: use driver specific legacy pseudomodule
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This introduces the cc2538_rf_netdev_legacy pseudomodule that switches
to the netdev-based implementation of the cc2538 radio driver.
2021-03-10 14:18:12 +01:00
Benjamin Valentin
dde3ca5f46
cpu/stm32: candev: derive number of CAN interfaces from vendor header
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We can deduce the number of available CAN interfaces from the vendor headers
so no need to hard-code this number for individual part numbers.
2021-03-09 11:30:21 +01:00
Francisco
fc82e3916e
Merge pull request #15931 from haukepetersen/add_dbgpin3
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sys: add `dbgpin` module for debugging and profiling (take 2)
2021-03-09 10:26:37 +01:00
benpicco
b09f799038
Merge pull request #16161 from madokapeng/nucleo722ze_CAN_support
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boards/nucleo-f722ze: Add periph_can
2021-03-08 19:22:38 +01:00
madokapeng
905723be59
sys/include/can: Add loopback operation mode
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tests/candev: Add loopback mode for testing purpose
2021-03-08 12:13:15 -05:00
Marian Buschsieweke
1a1a16eb7e
cpu/nrf5x_common: drop bogus rtt_set_counter()
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rtt_set_counter() is implemented as noop for nRF5x. This drops this bogus
implementation and the corresponding feature.
2021-03-08 17:34:30 +01:00
benpicco
2614831c86
Merge pull request #16137 from maribu/stm32_rtt
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drivers/periph_rtt: add periph_rtt_set_counter feautre
2021-03-08 16:53:57 +01:00
Marian Buschsieweke
ab89234040
drivers/periph/rtt: add periph_rtt_set_counter feature
...
Some periph_rtt implementations do not provide `rtt_set_counter()`. This
adds `periph_rtt_set_counter` as feature to allow testing for its
availability. The feature is provided at CPU level if periph_rtt is
provided by the board for all CPUs implementing `rtt_set_counter()`.
2021-03-08 14:16:46 +01:00
madokapeng
a38cd1477e
boards/nucleo-f722ze: Add periph_can support
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cpu/stm32: Add CAN support for f722ze board
f722ze board has ONLY 1 CAN interface, fix compiling error which
treats f722xx has more than 1 CAN.
2021-03-05 23:22:44 -05:00
aa67d2150a
Merge pull request #16097 from fjmolinas/pr_nrf52_uart_nb
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cpu/nrf52: add periph_uart_non_blocking to nrf52840
2021-03-04 19:37:15 +01:00
Marian Buschsieweke
b9cb75fedf
drivers/periph/rtt: add periph_rtt_set_counter feature
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Some periph_rtt implementations do not provide `rtt_set_counter()`. This
adds `periph_rtt_set_counter` as feature to allow testing for its
availability. The feature is provided at CPU level if periph_rtt is
provided by the board for all CPUs implementing `rtt_set_counter()`.
2021-03-04 18:05:06 +01:00
Tobias Nießen
8a56692236
cpu/native: rename _get_promiscous/_set_promiscous
2021-03-03 17:50:19 +01:00
Marian Buschsieweke
720b350f6f
cpu/stm32: fix periph_rtt
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For some reason rtt_get_alarm was never implemented. This adds the
missing function.
2021-03-03 17:02:59 +01:00
Francisco Molina
e2570f4d56
cpu/nrf52: add periph_uart_non_blocking to nrf52840
2021-03-03 08:12:12 +01:00
Hauke Petersen
ccca9855fe
cpu/msp430_common/kconfig: add dbgpin feature
2021-02-26 11:34:52 +01:00
Hauke Petersen
91f9d7db62
cpu/atmega_common/kconfig: add dbgpin feature
2021-02-26 11:34:52 +01:00
Hauke Petersen
899fe63fe2
cpu/cortexm_common/kconfig: add dbgpin feature
2021-02-26 11:34:52 +01:00
Hauke Petersen
edb890ff93
cpu/kinetis: move IRQ name adaption to cpu_conf.h
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Found and fixed the issue for the kinetis-based boards: The kinetis
code is using some macros to map some IRQ names, that differ in
some versions of vendor headers, to a RIOT wide unique name. The
doxygen of this mapping states, that this mapping must be done before
any vendor header is included. Unfortunately, the mapping was so far
placed in cpu/kinetis/vectors.c, before any other include statement.
In some cases, the vendor headers might be included before the
mapping macros in vectors.c, leading to the compilation errors down
the line. To fix this, the adaption defines are moved into
cpu/kinetis/cpu_conf.h, which is the file that actually includes
the vendor headers. This way it is ensured, that these adaption
macros are always defined before any vendor header is included,
and therefore preventing this kind of error for good.
2021-02-26 11:34:52 +01:00
Hauke Petersen
717a12507a
cpu/msp430_common: add dbgpin initialization
2021-02-26 11:34:52 +01:00
Hauke Petersen
71e9a9e216
cpu/atmega_common: add dbgpin initialization
2021-02-26 11:34:52 +01:00
Hauke Petersen
47a031e483
cpu/cortexm_common: add dbgpin initialization
2021-02-26 11:34:52 +01:00
Jean Pierre Dudey
4ca37c96b3
net/ieee802154: add PHY mode capabilities
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- Adds capabilities for each PHY mode. Converts the uint16_t caps field to an
uint32_t in order to hold all capability bits, size of the structure remains
unchanged due to alignment.
- Modifies the test application to configure the PHY mode using the shell
command. Also adds the PHY modes to the capabilities shell command.
- Updates the nrf802154 and cc2538 radio drivers to specify the PHY mode
supported.
Signed-off-by: Jean Pierre Dudey <me@jeandudey.tech>
2021-02-26 11:16:27 +01:00
a68cfacdd4
Merge pull request #16084 from yarrick/esp_link
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esp32/eth: Don't overwrite queued event with RX packet
2021-02-26 09:52:27 +01:00
Dylan Laduranty
cf40e0bfed
Merge pull request #16069 from benpicco/cpu/sam0_common/periph/spi-revert
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Revert "cpu/sam0_common: SPI: only mux MISO on spi_acquire()"
2021-02-25 19:15:09 +01:00
Francisco Molina
91443cb0f9
cpu/nrf5x_common/uart: power on correct UARTE
2021-02-25 14:26:12 +01:00
b5794c2a22
cpu/esp: set esptool as supported programmer
2021-02-24 13:29:56 +01:00
4dc8895093
cpu/cortexm_common: always add jlink as supported programmer
2021-02-24 13:27:04 +01:00
Erik Ekman
95196fb7e4
esp32/eth: Don't overwrite queued event with RX packet
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If there is an event to be handled by _esp_eth_isr(), don't
overwrite it if a new packet has been received.
In my testing, all SYSTEM_EVENT_ETH_CONNECTED events except the first
are immediately followed by at least one SYSTEM_EVENT_ETH_RX_DONE event.
This causes the SYSTEM_EVENT_ETH_CONNECTED to not get handled, and the
IP stack will not be notified of the new link state.
Protect the other events by dropping the packet instead. If an earlier
unhandled SYSTEM_EVENT_ETH_RX_DONE event exists, overwrite it with the
newer packet.
I only saw this happen with lwIP and not with GNRC - I am not sure why.
But it still is a race waiting to happen. The nice long term solution
is probably to have a queue of unhandled events, allowing them all to
be processed once there is time.
2021-02-24 01:20:43 +01:00
Francisco
c91499997e
Merge pull request #16030 from benpicco/drivers/mtd_flashpage-fix_native
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drivers/mtd_flashpage: fixes for native (and stm32l0, stm32l4)
2021-02-23 15:12:06 +01:00
Francisco
f85628cdb4
Merge pull request #16071 from benpicco/cpu/native/timer-periodic
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cpu/native: timer: implement timer_set_periodic()
2021-02-23 13:26:53 +01:00
Benjamin Valentin
65093a47a3
cpu/native: timer: fix style issue
2021-02-23 09:52:05 +01:00
Benjamin Valentin
7eb159c2a2
cpu/native: timer: implement timer_set_periodic()
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The native timer is not free running, so we can't honor it's flags.
But setitimer() already provides an interval option, we only have to enable it.
2021-02-23 09:51:53 +01:00
benpicco
d014f5e6d0
Merge pull request #14911 from OTAkeys/pr/can_stm32_deepsleep_opt
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stm32/can: add option to enable deep-sleep per device
2021-02-22 22:52:46 +01:00
Dylan Laduranty
dc8b96f7a6
Merge pull request #16060 from benpicco/cpu/sam0_common/periph/adc-errata
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sam0/adc: work around ADC errata on SAM D5x/E5x
2021-02-22 21:30:26 +01:00
Benjamin Valentin
a17686b551
Revert "cpu/sam0_common: SPI: only mux MISO on spi_acquire()"
...
This reverts commit 31bf0c5257
2021-02-22 19:46:10 +01:00
Benjamin Valentin
56654478d4
sam0/adc: work around ADC errata on SAM D5x/E5x
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The ADC SYNCBUSY.SWTRIG gets stuck to '1' after wake-up from Standby Sleep mode.
Ignore the ADC `SYNCBUSY.SWTRIG` status bit, this functionality is not used by
the driver anyway.
2021-02-22 12:39:32 +01:00
430770886b
make/esptool: fix FFLAGS inclusion order for qemu
2021-02-22 10:35:38 +01:00
Martine Lenders
de4ee0f934
Merge pull request #15562 from benpicco/socket_zep_register
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socket_zep: register with netdev, provide EUI-64 as command line parameter
2021-02-20 20:32:01 +01:00
Hauke Petersen
72db395963
cpu/nrf5x/kconfig: add VDD_LC_FILTER_REGx features
2021-02-19 17:19:45 +01:00
Hauke Petersen
cc2df0c508
cpu/nrf5x: use IS_ACTIVE to enable the DCDC conv
2021-02-19 17:19:28 +01:00
benpicco
8a498cb9fd
Merge pull request #16041 from jeandudey/2021_02_17-ccdocs
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cpu/cc26xx_cc13xx: add CPU documentation
2021-02-18 18:10:23 +01:00
15124e4769
Merge pull request #15002 from kaspar030/pr/xfa_v3
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core: introduce crossfile arrays (xfa) v3
2021-02-18 14:49:22 +01:00
Benjamin Valentin
2bdc5cf6d7
cpu/stm32: fix FLASHPAGE_ERASE_STATE for stm32l4
2021-02-18 14:22:11 +01:00
Benjamin Valentin
033c0110d0
cpu/native: flashpage: sector-slign the flashpage area
2021-02-18 14:22:11 +01:00
Jean Pierre Dudey
5a17e1335f
cpu/cc26xx_cc13xx: add CPU documentation
...
Signed-off-by: Jean Pierre Dudey <me@jeandudey.tech>
2021-02-18 11:28:06 +01:00
61d9f34748
cpu/lpc23xx: add XFA support
2021-02-18 10:46:08 +01:00
b3b04faadb
cpu/fe310: add XFA support
2021-02-18 10:46:08 +01:00
858b5ca6ed
xfa: remove obsolete empty xfa.ld
2021-02-18 10:46:08 +01:00
ee9d6c879a
cpu/native: add XFA support
2021-02-18 10:46:08 +01:00
f411fd4814
cpu/msp430_common: add XFA support
2021-02-18 10:46:08 +01:00
06ec602782
cpu/esp8266: add XFA support
2021-02-18 10:46:08 +01:00
91b987acd6
cpu/esp8266: add ld/ to linker search path, use it
2021-02-18 10:46:08 +01:00
2474fa7af5
cpu/esp32: add XFA support
2021-02-18 10:46:08 +01:00
d8d34e033c
cpu/cortexm_common: add XFA handling to linkerscript
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The global core/ldscripts/xfa.ld doesn't match our cortexm_base.ld.
This commit directly adds the two XFA lines to cortexm_base.ld.
In addition to that, a dummy (empty) xfa.ld is added, which the linker will pick
instead of core/ldscripts/xfa.ld, effectingly not using it.
2021-02-18 10:46:08 +01:00
José Alamos
093272c562
Merge pull request #16000 from jeandudey/2021_02_12-ieee802154-bitcaps
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net/ieee802154/radio: use bitflags for capabilities
2021-02-17 16:56:25 +01:00
benpicco
77035d6df3
Merge pull request #15900 from benpicco/cpu/stm32f1-gpio_test_and_clear
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cpu/stm32: GPIO/f1: use bitarithm_test_and_clear()
2021-02-17 15:32:39 +01:00
Jean Pierre Dudey
243de6e501
net/ieee802154/radio: use bitflags for capabilities
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Signed-off-by: Jean Pierre Dudey <me@jeandudey.tech>
2021-02-17 10:56:28 +01:00
Benjamin Valentin
17199dbb1c
socket_zep: allow to specify MAC address of ZEP device
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Add a command-line parameter for setting the EUI-64 of a ZEP device.
This allows a native node to use a persistent ZEP address across reboots.
2021-02-16 18:57:27 +01:00
bcb23da368
Merge pull request #16005 from benpicco/cpu/nrf52_gpio_count
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cpu/nrf5x_common: make GPIO_PIN macro model independent
2021-02-16 16:18:29 +01:00
Joakim Nohlgård
a23b29d42e
pic32_common: Add CPU specific xfa.ld variant
2021-02-16 14:55:26 +01:00
Joakim Nohlgård
6adeec09e9
atmega_common: add arch specific XFA ldscript to properly place .roxfa
2021-02-16 14:55:26 +01:00
Benjamin Valentin
eb89482a75
cpu/nrf5x_common: make GPIO_PIN macro model independent
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We can use the `GPIO_COUNT` vendor macro to check if there is more than
one GPIO port on nRF52.
This is the case for nRF52840 and nRF52833.
2021-02-14 00:30:25 +01:00
Benjamin Valentin
5a11fd2c66
cpu/nrf51: define GPIO_COUNT
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GPIO_COUNT is not defined in the vendor headers, but it's always one
for this family (one GPIO port).
2021-02-14 00:29:47 +01:00
Benjamin Valentin
a8fcc7b238
cpu/nrf5x: only enable DCDC for REG0 if REG0 exists
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nRF52833 has POWER_MAINREGSTATUS_MAINREGSTATUS_High, but no POWER->DCDCEN0
register.
This breaks all builds on this MCU.
Fix the ifdef to fix the build.
2021-02-14 00:06:34 +01:00
benpicco
3e3c4d06fb
Merge pull request #15955 from aabadie/pr/boards/microbit-v2
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boards: add support for microbit v2
2021-02-13 23:48:43 +01:00
benpicco
84e21e97f1
Merge pull request #15991 from haukepetersen/opt_nrf52_dcdc
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cpu/nrf5x: enable DC/DC also for REG0 if VDDH is used
2021-02-13 23:09:12 +01:00
Hauke Petersen
9d7a37a571
cpu/nrf5x: also enable DCDC for REG0 if used
2021-02-12 10:37:43 +01:00
Hauke Petersen
905fb34408
cpu/nrf5x/nrfble: let driver requeset HFXO
2021-02-12 10:16:50 +01:00
4dc7f33b2b
cpu/fe310: set newlib as default libc
2021-02-11 21:49:43 +01:00
Marian Buschsieweke
efb2adf27a
Merge pull request #15977 from maribu/ptp-api-fix-adjust
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drivers/periph_ptp: fix clock adjustment API
2021-02-11 17:28:02 +01:00
Hauke Petersen
63c23598b3
cpu/nrf52: add VDDHDIV5 as ADC input
2021-02-11 10:40:11 +01:00
41a89a31a9
boards: cpu: nfr52: fix typo in nrf52833 cpu model name
2021-02-10 13:39:51 +01:00
36ca3845c2
cpu/nrf5x_common: fix pin support for nrf52833xxaa model
2021-02-10 13:39:51 +01:00
Marian Buschsieweke
dbd241ef26
cpu/stm32/periph_ptp: update to new API
2021-02-10 10:09:26 +01:00
benpicco
a69da13d56
Merge pull request #15948 from jeandudey/2021_02_08-cc1350-launchpad
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boards: add cc1350 launchpad
2021-02-09 23:34:58 +01:00
Jean Pierre Dudey
b289c698b8
cpu/cc26xx_cc13xx: define GPIO_PIN macro
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This allows using the macro inside the periph_conf.h board files since the
periph/gpio.h header can't be included on the peripheral configuration.
Signed-off-by: Jean Pierre Dudey <me@jeandudey.tech>
2021-02-09 23:04:24 +01:00
benpicco
6929577c76
Merge pull request #15845 from benpicco/boards/adafruit-itsybitsy-m4
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boards: add adafruit-itsybitsy-m4
2021-02-09 19:41:43 +01:00
Benjamin Valentin
73f58bfa04
cpu/samd5x: Kconfig: don't provide periph_eth on CPU level
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It's up to the board to expose it.
2021-02-09 16:15:33 +01:00
benpicco
5fba2c8387
Merge pull request #14448 from benpicco/l2-peerstats-rebased
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net/netstats: L1/L2 per neighbor statistics
2021-02-09 14:54:53 +01:00
benpicco
bd79f573c7
Merge pull request #15935 from benpicco/cpu/native-flashpage
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cpu/native: add periph/flashpage implementation
2021-02-09 14:54:08 +01:00
Benjamin Valentin
cc9c58aae3
nrfmin: depend on gnrc_netif instead of gnrc_netdev_default
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`gnrc_netdev_default` is a pseudomodule, what this driver really wants
is gnrc_netif.
2021-02-09 12:27:58 +01:00
Francisco Molina
85caf7cbc7
drivers/flashpage: add FLASHPAGE_ERASE_STATE definition
2021-02-09 11:11:46 +01:00
benpicco
64779b6f98
Merge pull request #15944 from jeandudey/2021_02_08-cc26x0-cc13x0
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cpu/cc26x0: rename to cc26x0_cc13x0
2021-02-08 21:10:06 +01:00
Jean Pierre Dudey
aec0edbcb9
cpu/cc26x0_cc13x0: use SetupTrimDevice only on cc26x0
...
Signed-off-by: Jean Pierre Dudey <me@jeandudey.tech>
2021-02-08 17:25:42 +01:00
Jean Pierre Dudey
7db791476e
cpu/cc26x0: rename to cc26x0_cc13x0
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Signed-off-by: Jean Pierre Dudey <me@jeandudey.tech>
2021-02-08 17:25:42 +01:00
0b2810a856
riscv_common: make thread_yield_higher IRQ compatible
2021-02-08 11:04:18 +01:00
50cf93c719
Merge pull request #15718 from bergzand/pr/rv32i/fe310_rv32i_refactor
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riscv_common: Refactor common fe310 code to riscv_common
2021-02-08 10:27:41 +01:00
Benjamin Valentin
1acbd6e560
cpu/native: add periph/flashpage implementation
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Add a simple RAM-backed flashpage implementation for native, to
allow for easier testing of flashpage based applications / features.
2021-02-05 23:31:46 +01:00
2692957c0e
riscv_common: Refactor common fe310 code to riscv_common
2021-02-05 09:32:19 +01:00
b666b78602
Merge pull request #15914 from fjmolinas/pr_stm32_flashpage_fix_per
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cpu/stm32/flashpage: reset PER after erase
2021-02-03 10:21:04 +01:00
Francisco
3b2a55a923
Merge pull request #15865 from benpicco/pm_layered-default
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cpu: make pm_layered a DEFAULT_MODULE
2021-02-03 08:17:29 +01:00
Vincent Dupont
2edf37ed5b
cpu/stm32/can: use en_deep_sleep_wake_up by default
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Add en_deep_sleep_wake_up = true in default candev_conf in can_params.h
2021-02-02 15:39:27 +01:00
Vincent Dupont
eb0f6582c7
stm32/can: add option to enable deep-sleep per device
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Deep-sleep was based on using rx pin as external interrupt to be able to
wake up from stop mode. If rx pin cannot be used as interrupt or user
does not need to wake up from stop from the CAN, an option is now
present. If en_deep_sleep_wake_up is set to false, setting the device to
sleep simply unblock stop mode. Otherwise the behavior is unchanged.
2021-02-02 15:32:25 +01:00
Francisco Molina
3d68406c5b
cpu/stm32/flashpage: reset PER after erase
2021-02-02 11:42:09 +01:00
Benjamin Valentin
4095eac9f2
cpu: mips32r2_common: set BITARITHM_HAS_CLZ
...
The MIPS ISA implements CLZ:
https://ti.tuwien.ac.at/cps/teaching/courses/cavo/files/MIPS32-IS.pdf
For `tests/periph_gpio` this shaves off 20 bytes on `6lowpan-clicker`.
2021-02-02 11:14:38 +01:00
