The current context switch and thread stack init don't have a generic
way to save/restore registers for all AVR-8 variations. This add
defines to check flash/data sizes and rework:
- thread_stack_init
- avr8_context_save
- avr8_context_restore
The new implementation add missing RAMP D/X/Y registers that are used
by XMEGA variations.
The rules to add EIND, RAMP(D,X,Y,Z) register are:
- EIND must be added if device have more than 128k flash. This means,
device can access more than 64k words in flash.
- RAMP D/X/Y must be added if device have or can address more than
64k data.
- RAMPZ must be added if device can address more than 64k bytes of
flash or data.
With above rules there is no necessity to check by device because it is
mandatory the registers for those MCU variations.
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
Add ATxmega common files and cpu definitions.
This works was originally developed by @Josar. The 2018 version
were port to 2021 mainline.
This version changes original port to have only the atxmega CPU
definition. With that, all family can be accomodated.
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
Some mega boards enabling global irq at board_init. This moves that
responsability to cpu/avr8_common to create a common point to all
variants.
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
The ATxmega can have up to 8 UARTs. This increase from 2 up to 7 to
keep avr8_state flags with 8 bits wide.
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
There are some Linux distributions that gdb-multiarch doesn't work as
expected and debug section not start. Since AVARICE is dedicated to
AVR architecture, let's check first by the default tool then multiarch
version.
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
qDSA as optimized implementations for AVR. The logic to select the optimized
backend predates the architecture features and uses some hand crafted logic.
This updates the logic to select the backend based on the boards architecture
using the feature system instead.
Some periph_rtt implementations do not provide `rtt_set_counter()`. This
adds `periph_rtt_set_counter` as feature to allow testing for its
availability. The feature is provided at CPU level if periph_rtt is
provided by the board for all CPUs implementing `rtt_set_counter()`.
