There is size difference for atomic_int_fast8 and atomiic_uint_fast8
on FreeBSD, i.e., they match uint32_t with size of 4 bytes instead of
uint8_t with size of 8. Hence, tests/c11_atomics_cpp_compat buildtest
fails on FreeBSD.
The CC26x2 and CC13x2 share the same register definitions, and both are
treated equally in the TI's technical reference manual. [1]
- To avoid confusions in the future I renamed it to `cc26x2_cc13x2`.
- Documentation was updated.
- The `cc1312-launchpad` board that uses the `cc13x2` MCU was updated.
- The `cc1352-launchpad` board that uses the `cc13x2` MCU was updated.
[1]: https://www.ti.com/lit/ug/swcu185d/swcu185d.pdf
Signed-off-by: Jean Pierre Dudey <jeandudey@hotmail.com>
With the new toolchain version required to fix issue #13133, the compilation of `examples/posix_socket` fails due to a C linkage error in `atomic_base.h`. The reason is that including `drivers/include/mtd.h` in `boards/esp32/board_common.h` inside the `extern C` block finally leads to including `atomic_base.h` inside the `extern C` block which in turn to the C linkage error for the template definitions in this file.
For atmega boards a TX has not actually completed until UDRn is empty
as well as the Transmit Shift Register.
To avoid resetting an UART before a TX has completed we use the TXCn
flash and ISR to set a variables that indicates TX is ongoing. This
allows not reseting the UART while there are ongoing TX pending.
This fixes an issue where part of the last byte is not shifted out
of the TX shift register causing rubish on the first TX following an
uart_init.
Without this change a RIOT application compiled with all-asan will
segfault as RIOT provides its own malloc by default. Add a define for
disabling custom malloc, calloc and realloc implementations and use it
when compiling with all-asan.
ESP32 can be clocked with either a 40 MHz or 26 MHz crystal. Since most boards use a 40 MHz crystal, the configuration was previously fixed to a 40 MHz crystal. This commit changes the crystal from 40 MHz to automatic detection, allowing boards with a 26 MHz crystal like the Sparkfun ESP32 Thing DEV to be used.
- Unecessary definitions are removed.
- Since the 48-bit RTC hardware timer uses a RC oscillator as clock, it is pretty inaccurate and leads to a RTC time deviation of up to 3 seconds per minute. Therefore, a calibration during the boot time determines a correction factor for the 48-bit RTC hardware timer. Function _rtc_time_to_us uses now this correction factor and converts a raw 48-bit RTC time to a corrected time in microseconds. Thus, the 48-bit RTC timer becomes much more accurate, but it can't still reach the accuracy of the PLL driven 64-bit system timer. The Advantage of using RTC over 64-bit sydtem timer is that it also continues in deep sleep mode and after software reset.
- If the 64-bit system timer is used to emulate the RTC timer, it uses the RTC hardware timer to continue its operation after software .
It is possible to use different timers as RTC timer for the periph_rtc module. Either the 48-bit RTC hardware timer is used directly or the PLL driven 64-bit system timer emulates a RTC timer. The latter one is much more accurate. Pseudomodule esp_rtc_timer controlls which timer is used. Only if esp_rtc_timer is enabled explicitly, the 48-bit RTC hardware timer is used. Otherwise the 64-bit sytstem timer is used to emulate the RTC timer.
The explicit call of rtc_init during the CPU start was removed because rtc_init is called within the function periph_init. The display of the system time at startup had to be placed after the call to periph_init.
There is an existing function that returns the system time in us as a 64 bit value. Converting this 64 value in us to a 32 bit value in ms is more easier and uses the complete 32 bit range. Using only the low part of the 64 bit system time in us and dividing it by 1e3 cuts the 32 bit range.
To control the log level and the format of the log output of SDK libraries, a bunch of library-specific printf functions are realized which map the log output from SDK libraries to RIOT's log macros.