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Commit Graph

43249 Commits

Author SHA1 Message Date
Dylan Laduranty
701242d38d cpu/stm32/usbdev_fs: fix EP_REG(x) assignment for toggleable bits
EP_REG(x) registers have a total of 6 toggleable bits. Those bits can only be toggled if we write a one to it, otherwise writing a zero has no effect
This commit fixes all the access to these registers to prevent from modifying these bits when not needed

Signed-off-by: Dylan Laduranty <dylan.laduranty@mesotic.com>
2023-04-07 22:35:45 +02:00
bors[bot]
ec4f2ea1ba
Merge #19458
19458: sys/usbus/msc: fix EP sizes for USB HS and buffer alignment in DMA-mode r=dylad a=gschorcht

### Contribution description

This PR fixes the EP data sizes for the bulk endpoints of USB HS peripherals and the buffer alignment required in DMA mode.

The fixes are required to get USBUS MSC working with USB HS peripherals.

### Testing procedure

The test requires PR #19459.

Connect a SPI SD Card interface with a STM32 board with USB HS port and HS PHY and use `tests/usbus_msc` to test, for example:
```
USEMODULE='sdcard_spi mtd_sdcard_default periph_usbdev_hs_ulpi' \
CFLAGS='-DSDCARD_SPI_PARAM_CLK=GPIO_PIN\(PORT_I,1\) -DSDCARD_SPI_PARAM_MISO=GPIO_PIN\(PORT_B,14\) -DSDCARD_SPI_PARAM_MOSI=GPIO_PIN\(PORT_B,15\) -DSDCARD_SPI_PARAM_CS=GPIO_PIN\(PORT_A,8\)' \
BOARD=stm32f746g-disco make -j8 -C tests/usbus_msc flash
```
SD card should work with this PR.

### Issues/PRs references


Co-authored-by: Gunar Schorcht <gunar@schorcht.net>
2023-04-07 20:16:58 +00:00
Dylan Laduranty
164331eb0d cpu/stm32/usbdev_fs: fix endpoint registration mechanism
For the usbdev_fs peripheral, IN and OUT endpoints of the same index must have the same type.
For instance, if EP1 OUT is a bulk endpoint, EP1 IN must either be unused or used as bulk too but it cannot be used as interrupt or isochronous.
With the previous check, the following registration pattern (EP OUT Bulk -> EP IN Interrupt -> EP IN Bulk) would assign both EP OUT Bulk and EP IN Interrupt to same endpoint index. So the configuration would be broken.
Applying the same registration pattern with this patch would now produce EP OUT Bulk -> 1 / EP IN Interrupt -> 2 / EP IN Bulk 1. Which is a working configuration for this IP

Signed-off-by: Dylan Laduranty <dylan.laduranty@mesotic.com>
2023-04-07 21:23:15 +02:00
Gunar Schorcht
44e9db86c0 sys/usbus/msc: fix EP sizes and buffer alignment for HS in DMA-mode 2023-04-07 19:06:24 +02:00
Gunar Schorcht
eff6c93cec drivers/usbus_synopsys_dwc2: fix interrupt handling in DMA mode 2023-04-07 12:43:02 +02:00
bors[bot]
d769537ad3
Merge #19457
19457: tests/drivers_at24cxxx: make it easier to select other EEPROMS r=fabian18 a=fabian18



Co-authored-by: Fabian Hüßler <fabian.huessler@ml-pa.com>
2023-04-06 12:14:23 +00:00
Fabian Hüßler
b45a3f9ad0 tests/drivers_at24cxxx: make it easier to select other EEPROMS 2023-04-06 12:51:09 +02:00
Marian Buschsieweke
dd86da6c76
cpu/stm32/periph_gpio_ll: Fix misleading comments
The comments still claim STM32F1 support is missing, but this was
recently added.

Also, drop an empty line to fix `too many consecutive empty lines`
nitpick of the CI.
2023-04-06 08:31:48 +02:00
bors[bot]
8c99576247
Merge #19455
19455: usbus/msc: fixes for synopsys dwc2 driver r=gschorcht a=dylad

### Contribution description

This PR provides two fixes for USBUS MSC driver.
9e88db7 removes a call to `usbdev_control_slicer_ready()` as this function is called by USBUS stack right after so remove this call to avoid duplication.
608d49c moves the call to `usbdev_ep_xmit()`, which prepares the bulk MSC OUT endpoint to receives data, from the `_init()` function to `USB_MSC_SETUP_REQ_GML` control request. The issue was that this endpoint was prepare to early and an USB reset might reset this setting. (This is the case for the `usbdev_synopsys_dwc2` driver) Thus the endpoint is not ready to receive data when the host send it. 

### Testing procedure
Test this PR with `tests/usbus_msc` on any board using the `usbdev_synopsys_dwc2` driver **with a FS PHY**
There is another issue with HS PHY that should be fix too.


### Issues/PRs references
None.


Co-authored-by: Dylan Laduranty <dylan.laduranty@mesotic.com>
2023-04-06 05:00:49 +00:00
Dylan Laduranty
608d49c51a usbus/msc: ready MSC bulk OUT endpoint in USB_MSC_SETUP_REQ_GML request
Signed-off-by: Dylan Laduranty <dylan.laduranty@mesotic.com>
2023-04-05 20:16:53 +02:00
Dylan Laduranty
9e88db7f50 usbus/msc: remove call to usbdev_control_slicer_ready()
This function should not be called by the driver as USBUS will handle it already. So remove this call to prevent duplication

Signed-off-by: Dylan Laduranty <dylan.laduranty@mesotic.com>
2023-04-05 20:14:59 +02:00
bors[bot]
07be4be9ed
Merge #19453
19453: README.md: Remove HiL Badge r=aabadie a=MrKevinWeiss

### Contribution description

Since the HAW-Hamburg hack and change to the RIOT community server the HiL is not operating.  We should remove it until it is brought back. likely with some improvements and with different links.


### Testing procedure

Before this PR: click on it  and be sad
After PR: Forget your sorrows

### Issues/PRs references



Co-authored-by: MrKevinWeiss <weiss.kevin604@gmail.com>
2023-04-05 13:49:48 +00:00
Gunar Schorcht
3d1f3fea46 cpu/esp_common: fix compilation issues gcc 12.2 2023-04-05 13:46:26 +02:00
Gunar Schorcht
c4881cc148 pkg/esp32_sdk: patches for compilation with gcc 12.2 2023-04-05 13:46:25 +02:00
bors[bot]
d864b8a712
Merge #19446
19446: cpu/stm32: Fix periph_gpio_ll_irq r=MrKevinWeiss a=maribu

### Contribution description

This fixes a high impact typo that broke GPIO LL IRQ support on a bunch of STM32 families.

### Testing procedure

```
make BOARD=nucleo-f429zi flash test-with-config -j16 -C tests/periph_gpio_ll
[...]
TEST SUCCEEDED
```



Co-authored-by: Marian Buschsieweke <marian.buschsieweke@ovgu.de>
2023-04-05 11:06:01 +00:00
MrKevinWeiss
ef743fe6f2
README.md: Remove HiL Badge
Since the HAW-Hamburg hack and change to the RIOT community server
the HiL is not operating.  We should remove it until it is brought
back. likely with some improvements and with different links.
2023-04-05 11:28:52 +02:00
Marian Buschsieweke
8bfd74d004
cpu/stm32: Fix periph_gpio_ll_irq
Fixing a high impact typo that broke GPIO LL IRQ support on a bunch
of STM32 families.
2023-04-04 17:23:21 +02:00
bors[bot]
d6dc3a1603
Merge #19444
19444: makefiles/tools/serial.inc.mk: Handle new miniterm versions r=maribu a=MrKevinWeiss



### Contribution description

While testing examples/micropython I notice that the default of miniterm.py is actually miniterm. To simplify user setups, this checks for miniterm.py first then falls back to miniterm.

### Testing procedure

Take any board with any newish version of Ubuntu and run
```
make -C flash test examples/micropython
```

If you have `miniterm.py` in `PATH` or if it is `miniterm` both should work.

### Issues/PRs references



Co-authored-by: MrKevinWeiss <weiss.kevin604@gmail.com>
2023-04-04 10:59:16 +00:00
MrKevinWeiss
6d729033e5
makefiles/tools/serial.inc.mk: Handle new miniterm versions
While testing examples/micropython I notice that the default of miniterm.py is actually miniterm.
To simplify user setups, this checks for miniterm.py first then falls back to miniterm.
2023-04-04 12:47:54 +02:00
bors[bot]
985a38cd09
Merge #19431
19431: cpu/stm32: Fix periph_spi operation in non-DMA mode r=MrKevinWeiss a=maribu

### Contribution description

The driver previously failed to reliably clear the RXNE bit, resulting in the next transfer to incorrectly read a stale register value. This was noticed with the SD card SPI driver on an STM32F4, in which the 0xff byte of the previous byte transfer was returned instead of the actual status byte, throwing the SD card driver off the rails.

### Testing procedure

Connecting an SD card via SPI to a Nucleo-2F429ZI should now result is almost reliable operation.

### Issues/PRs references

None

Co-authored-by: Marian Buschsieweke <marian.buschsieweke@ovgu.de>
2023-04-03 13:22:41 +00:00
bors[bot]
ca6bca5737
Merge #19442
19442: pkg/lvgl: bump to v8.3.6 r=bergzand a=aabadie



Co-authored-by: Alexandre Abadie <alexandre.abadie@inria.fr>
2023-04-03 09:33:59 +00:00
293d955cbf
pkg/lvgl: bump to v8.3.6 2023-04-03 11:18:46 +02:00
bors[bot]
7d710a0f14
Merge #19441
19441: pkg/semtech-loramac: fix makefile highlighting in documentation r=aabadie a=aabadie



Co-authored-by: Alexandre Abadie <alexandre.abadie@inria.fr>
2023-04-03 07:17:52 +00:00
be54114b6d
pkg/semtech-loramac: fix makefile highlighting in documentation 2023-04-03 08:15:50 +02:00
bors[bot]
f797bbee2e
Merge #19438
19438: usbus: Add support for full speed with high speed phy r=miri64 a=bergzand

### Contribution description

This adds infrastructure around usbus and usbdev to query the speed of the USB link after enumeration. This as the maximum speed of the link might be slower than the maximum speed of the peripheral. This is the case with the stm32f429i-disco board that has a full speed phy coupled with the high speed peripheral.

This also adds the necessary code to the cdc_ecm code to use the correct packet size. The allocated buffer size is not modified with this PR unfortunately.

### Testing procedure

The `cdc_ecm` handler should work with a HS peripheral coupled with a FS phy.

### Issues/PRs references

Fixes an issue caused by #19358


Co-authored-by: Koen Zandberg <koen@bergzand.net>
2023-03-31 17:00:16 +00:00
ca0d0758bf
Revert "tests/usbus_cdc_ecm: blacklist stm32f429i-disco"
This reverts commit 281db4bfa8.
2023-03-31 16:44:03 +02:00
329727784b
Revert "boards/stm32f429-disc*: do not use periph_usbdev_hs"
This reverts commit 05160f9c2a.
2023-03-31 16:43:51 +02:00
8044e578b5
cdc_ecm: Update max supported transfer size after reset 2023-03-31 16:43:44 +02:00
8b41443913
usbus: Add functions to query max packet sizes 2023-03-31 16:43:44 +02:00
aa67c98a4a
synopsys_dwc2: implement USBOPT_ENUMERATED_SPEED 2023-03-31 16:43:44 +02:00
86e2953470
usbopt: add USBOPT_ENUMERATED_SPEED 2023-03-31 16:43:44 +02:00
bors[bot]
e112749946
Merge #19437
19437: boards: fix USB configuration for stm32f429i-disco r=bergzand a=gschorcht

### Contribution description

This PR fixes the problem that CDC ECM is not working for `stm32f429i-disco`.

With PR #19358, the EP data size for CDC ECM bulk endpoints was increased to 512 byte to fix the problem that CDC ECM was not working for boards with USB High-Speed peripherals. Module `periph_usbdev_hs` was introduced to indicate whether a high-speed peripheral is used.

However, the `stm32f429i-disco` board uses a mixture of USB OTG HS peripheral together with the on-hip FS PHY. Using the USB OTG HS peripheral together with a FS-PHY and increasing the EP data size for the CDC ECM bulk endpoint to 512 bytes doesn't work. Therefore, module `periph_usbdev_hs` is not used for now to workaround the problem. Thus, the maximum number of EPs used is that of the USB OTG FS peripheral, which is only 4. This is not sufficient for this test application since the board uses `stdio_cdc_acm`. The board is therefore blacklisted.

### Testing procedure

Use a `stm32f429i-disc1` or a `stm32f429i-disco` board and flash the test app:
```
USEMODULE=stdio_uart BOARD=stm32f429i-disco make -j8 -C tests/usbus_cdc_ecm flash
```
With this PR it should be possible to ping the board.

### Issues/PRs references

Co-authored-by: Gunar Schorcht <gunar@schorcht.net>
2023-03-31 11:58:22 +00:00
Gunar Schorcht
281db4bfa8 tests/usbus_cdc_ecm: blacklist stm32f429i-disco
The board no longer uses the `periph_usbdev_hs` module. Therefore, the maximum number of EPs used is that of the USB OTG FS peripheral, which is only 4. This is not sufficient for this test application since the board uses `stdio_cdc_acm`.
2023-03-31 12:27:51 +02:00
Gunar Schorcht
05160f9c2a boards/stm32f429-disc*: do not use periph_usbdev_hs
The board uses the USB OTG HS peripheral together with the on-hip FS PHY. Using the `periph_usbdev_hs` module increases the EP data size for the CDC ECM bulk endpoint to 512 bytes, which does not work for the FS interface. Module `periph_usbdev_hs` is therefore not used.
2023-03-31 12:21:41 +02:00
bors[bot]
a7c857dd60
Merge #19417
19417: boards/esp32c3-wemos-mini: add support for Wemos ESP32-C3 mini r=benpicco a=gschorcht

### Contribution description

This PR provides the support for the [Wemos ESP32-C3 mini](https://www.wemos.cc/en/latest/c3/c3_mini.html) board.

### Testing procedure

The board should work for provided features.

The board was already tested with:
- [x] `tests/driver_sht3x` using I2C
- [x] `tests/driver_l3gxxxx` using SPI
- [x] `tests/periph_adc`
- [x] `tests/periph_pwm`
- [ ] `tests/driver_ws281x`

### Issues/PRs references


Co-authored-by: Gunar Schorcht <gunar@schorcht.net>
2023-03-30 16:51:46 +00:00
Gunar Schorcht
79fc49cc76 boards/esp32c3-wemos-mini: add support for Wemos ESP32-C3 mini 2023-03-30 18:41:08 +02:00
Marian Buschsieweke
b2199bb744
cpu/stm32: Fix periph_spi operation in non-DMA mode
The driver previously failed to reliably clear the RXNE bit, resulting
in the next transfer to incorrectly read a stale register value. This
was noticed with the SD card SPI driver on an STM32F4, in which the
0xff byte of the previous byte transfer was returned instead of the
actual status byte, throwing the SD card driver off the rails.
2023-03-30 10:36:20 +02:00
Gunar Schorcht
128a633296 boards/common/esp32: use boards_common_esp32x 2023-03-30 07:27:13 +02:00
Gunar Schorcht
f8dd7e55d5 boards/common/esp32c3: use boards_common_esp32x 2023-03-30 07:06:13 +02:00
Gunar Schorcht
a2661b7f8f boards/common/esp32s2: use boards_common_esp32x 2023-03-29 18:42:34 +02:00
Gunar Schorcht
f80b6a1f92 boards/common/esp32s3: use boards_common_esp32x 2023-03-29 18:42:34 +02:00
Gunar Schorcht
cb1ebda475 boards/common: add module boards_common_esp32x
The commit moves the header files from `boards/common/esp32s3/include` that can be used for all types of ESP32x SoCs to a new common ESP32x board module.
2023-03-29 18:42:34 +02:00
bors[bot]
7f95ee7558
Merge #19373
19373: examples/suit_update: improve default module selection r=bergzand a=benpicco



Co-authored-by: Benjamin Valentin <benjamin.valentin@ml-pa.com>
2023-03-29 09:44:59 +00:00
bors[bot]
198aadfc0a
Merge #19424
19424: drivers/ws281x: add RMT hardware support for ESP32x SoCs r=maribu a=gschorcht

### Contribution description

This PR provides support for ESP32x RMT that is used to generate WS2812B signals.

All ESP32x SoCs have a [Remote Control Peripheral (RMT)](https://docs.espressif.com/projects/esp-idf/en/v4.4.4/esp32/api-reference/peripherals/rmt.html) that can be used to generate digital waveforms, such as NEC remote control signals or WS2812B RGB LED signals. Each RMT peripheral has either 4 or 8 channels. Some ESP32x SoCs support configuring the clock sources used for each channel separately, while other ESP32x SoCs can only use a single clock source for all channels.

The advantages using the RMT are that the CPU is not busy when generating the WS218x signal and the phase times are accurate to nanoseconds. The disadvantage is that the configuration of the RMT is so complex due to its flexibility that the [ESP-IDF high-level driver for RMT](https://docs.espressif.com/projects/esp-idf/en/v4.4.4/esp32c3/api-reference/peripherals/rmt.html) is used.This requires about 6 kBytes more ROM, about 3 kBytes more IRAM, and 88 bytes more RAM.

Therefore, either the RMT hardware implementation (module `ws2812x_esp32_hw`) as well as the bit-banging software implementation  (module  `ws2812x_esp32_hw`) can be used. RMT hardware implementation (module `ws2812x_esp32_hw`) is used by default.

Timing with hardware implementation:
![ws281x_esp32_rmt](https://user-images.githubusercontent.com/31932013/227791452-5cc1f95e-04ac-43bb-b11c-f131ab7ab1d5.png)

### Testing procedure

`tests/driver_ws281x` should still work, for example:
```
CFLAGS='-DWS281X_PARAM_PIN=GPIO45 -DWS281X_PARAM_NUMOF=47' BOARD=esp32s3-devkit make -j8 -C tests/driver_ws281x flash
```
Test Output:
https://user-images.githubusercontent.com/31932013/227791753-e6d2924e-3364-4387-870f-a56d3a9a8a80.mp4


### Issues/PRs references


Co-authored-by: Gunar Schorcht <gunar@schorcht.net>
2023-03-29 07:42:28 +00:00
Gunar Schorcht
be03323977 tests/driver_ws281x: add ESP32x CI boards to test ws281x_esp32_sw
fixup! tests/driver_ws281x: add ESP32x CI boards to test ws281x_esp32_sw
2023-03-29 08:57:36 +02:00
Gunar Schorcht
6d78cef999 drivers/ws281x: add ESP32x hardware support 2023-03-29 00:47:35 +02:00
Gunar Schorcht
b2f9cdac23 boards/common/esp32x: add RMT configuration 2023-03-29 00:47:35 +02:00
Gunar Schorcht
d4d4bc4df1 cpu/esp32: add RMT configuration type 2023-03-29 00:47:35 +02:00
Gunar Schorcht
45d69df4c0 cpu/esp32/esp-idf: add ESP-IDF RMT driver module 2023-03-29 00:47:35 +02:00
Gunar Schorcht
6cb4a66ff6 cpu/esp32: add interrupt for RMT 2023-03-28 18:50:48 +02:00