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Commit Graph

18 Commits

Author SHA1 Message Date
Leandro Lanzieri
e5aca465bd
cpu/stm32/kconfig: fix rtt:rtc error symbol
It only exists conflict between the usage of RTC and RTT on the F1
family, but the error symbol was being set for all of them. This fixes
the issue.
2021-01-23 09:59:03 +01:00
Gilles DOFFE
ce0ef8939c cpu/stm32: disable periph_wdt for mp1 family
In STM32MP1 family, independant watchdogs (IWDG1 and IWDG2) are
dedicated to the MPU (Cortex-A7). Thus simply disable the feature
for STM32MP1 family.

Signed-off-by: Gilles DOFFE <gilles.doffe@savoirfairelinux.com>
2020-11-13 10:43:08 +01:00
Gilles DOFFE
d173097d7f cpu/stm32: do not build bootloader for mp1
The stm32mp1 family has no flash. The firmware is loaded directly in
RAM by stlink programmer or by Cortex-A7 bootloader/OS.
Thus bootloader is useless for this family, disable it.

Signed-off-by: Gilles DOFFE <gilles.doffe@savoirfairelinux.com>
2020-11-13 10:43:08 +01:00
7fbfb92f03
boards/stm32gx: move Kconfig clock config to cpu 2020-10-29 23:00:44 +01:00
2720c5526c
cpu/stm32: rename kconfig directory to kconfigs
The kconfig directory names clashes with Kconfig file on non case sensitive filesystems
2020-10-21 09:18:24 +02:00
Leandro Lanzieri
fe6d66d92a
kconfig: add ERROR symbol for conflicting modules 2020-10-09 18:04:17 +02:00
40262c1b7a
cpu/stm32: reorganize Kconfig files per families 2020-09-30 10:31:38 +02:00
d1bab4a25f
cpu/stm32: add Kconfig config for all cpu lines 2020-09-30 10:31:29 +02:00
ba4edb3c63
cpu/stm32: split main Kconfig 2020-09-30 10:31:29 +02:00
ef742cddb2
cpu/stm32: add support for stm32g431rb 2020-09-29 12:26:26 +02:00
25e1fec90c
cpu/stm32: add support for stm32g071rb 2020-09-25 13:08:07 +02:00
Benjamin Valentin
d9116684e5 cpu/cortexm_common: advertise puf_sram feature
`puf_sram` is a feature of the linker script, it does not need vendor
specific hardware support.
2020-09-11 16:30:45 +02:00
b4aa2dae3e
cpu/stm32: remove MPU feature from stm32l052t8 2020-08-21 15:25:26 +02:00
fd71e09b69
cpu/stm32: disable MPU for stm32g0
MPU is broken on cortex-m0+ in the current state
2020-08-21 14:56:47 +02:00
Marian Buschsieweke
7d9aed7f66
Merge pull request #14391 from benpicco/cpu/stm32-timer_periodic
cpu/stm32: implement periph_timer_periodic
2020-08-10 07:58:27 +02:00
Benjamin Valentin
a0972c9e0c cpu/stm32: implement periph_timer_periodic
Seems like the Interrupt flag for a Capture/Compare channel gets set when

- the CC-value is reached
- the timer resets before the CC value is reached.

We only want the first event and ignore the second one. Unfortunately I did
not find a way to disable the second event type, so it is filtered in software.

That is we need to

 - ignore the CC-interrupts when the COUNT register register is reset
 - ignore the CC-interrupts > TOP value/ARR (auto-reload register)
2020-08-09 22:55:22 +02:00
dada52ecd2
cpu/stm32: add stm32g0 support 2020-07-21 12:45:25 +02:00
8046a74e50
cpu/stm32: model features in Kconfig 2020-07-16 11:34:02 +02:00