Similar to the cortex-m common linker scripts, the RISC-V linker scripts
can be unified easily, requiring only the memory addresses and lengths.
This simplifies adding new RISC-V CPU's later
The rv32imac supports the A (atomic) extensions containing
read-modify-store operations. This commit modifies the GPIO code to use
these for all bitwise operations. The atomic operations are emitted with
relaxed ordering as they do not require multiprocessor synchronization.
This decreases the duration of the gpio operations from 59 ns to 50 ns
per call. depending a bit on the type of operation.
This is a small optimization to the RISC-V trap handler. By splitting
the call to sched_run from the trap_handle call, loading the previous
thread ptr can be delayed until after it is determined that a schedule
run is required. This shaves of a few cycles during regular interrupts
that do not trigger the scheduler.
This commit reworks the trap entry to only save the callee-saved
registers when a context switch is required. the caller-saved registers
are always stored and restored to adhere to the RISC-V ABI. This saves
considerable cycles on interrupts.
The RISC-V timer should only be touched by periph/timer and must not be
initialized and enabled by the IRQ code. The current code can cause an
unhandled interrupt when the timer is not used and the mtime register
hits UINT64_MAX.
Allocate and initialize a thread-local block for each thread at the
top of the stack.
Set the tls base when switching to a new thread.
Add tdata/tbss linker instructions to cortex_m and risc-v scripts.
Signed-off-by: Keith Packard <keithp@keithp.com>
---
v2:
Squash fixes
v3:
Replace tabs with spaces
v4:
Add tbss to fe310 linker script
Disable the newlib-nano stubs code when picolibc is in use
Signed-off-by: Keith Packard <keithp@keithp.com>
---
v2:
Squash fixes in
v3:
call stdio_init in _PICOLIBC_ mode to initialize uart
v3:
Remove call to stdio_init from nanostubs_init, always
call from cpu_init.
Picolibc makes atexit state per-thread instead of global, so we can't
register destructors with atexit in a non-thread context as we won't
have any TLS space initialized.
Signed-off-by: Keith Packard <keithp@keithp.com>
- Add libstdcpp feature to indicate a platform is providing a libstdc++
implementation ready for use
- The existing cpp feature now only indicates a working C++ toolchain without
libstdc++. (E.g. still useful for the Arduino compatibility layer.)
- Added libstdcpp as required feature were needed
- Added some documentation on C++ on RIOT
Other archs use `_sheap` and `_eheap` to mark the start and end of
the heap.
fe310 uses `_heap_start` and `_heap_end`, so platform independent
code that wants to make use of this will needlessly fail.
For compatibility with common code, name them the same on fe310.
