This commit adds the periph_uart_mode USEMODULE
It implements all functionality defined in the common uart driver
This means all parity modes, data bits, and stop bits
Adapt the periph ADC implementation to use vendor defines where
ever possible. Remove duplicate or obsolete defines and adapt
board configuration as required.
Rework SPI periph driver to use proper RIOT GPIO API functions.
Also cleanup header files by using vendor defines and remove
obsolete code. Further, adapt board config accordingly.
The SPI bus frequency/clock is calculated relative to the MCUs
core clock. Currently all boards use the default 32MHz, hence
prescaler settings for SPI are all the same. This PR moves the
default config for 32MHz to the CPU and allows to be overriden
by board config if needed.
Changed the style of the UART configuration for different boards,
from a define based configuration to one based on an array of
structs, one struct for each UART, with the format of the struct defined
in cc2538/include/periph_cpu.h.
- Defined the fields of the struct in periph_cpu.h
- Removed the compilation includes that were in uart.c for each UART
- Implemented a generic ISR subroutine for clarity
- combined uart_base and uart_init in uart.c
- used bitmask for the interrupt setup
- took the uart Rx, Tx, and IRQ numbers out of the config
(as this has to match the .dev field). Replaced with
macros from the uart number
- took out some unused code
- implemented power on/off commands
- removed reset function - now bytes are just discarded on error
- Rx now not initialised if Rx callback = NULL, as per
drivers/periph/uart.h
- device is now enabled after callbacks are set, not before
- asserts raised if rts and cts are enabled for UART0
- BIT macro removed
