RIOT-OS/RIOT
RIOT-OS/RIOT
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18,487 Commits 40 Branches 189 Tags 262 MiB
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3499 Commits

Author SHA1 Message Date
Cenk Gündoğan
835f8f0daa
Merge pull request #9290 from PeterKietzmann/pr_sram_puf 
Add SRAM based PRNG seeder
 2018-07-04 18:08:53 +02:00
PeterKietzmann
2f86d6fcd8 cpu/cc2538: add SRAM based random seed 2018-07-04 17:55:20 +02:00
PeterKietzmann
347b972538 cpu/samd21: add SRAM based random seed 2018-07-04 17:55:20 +02:00
PeterKietzmann
729e3f2ac4 cpu/stm43f4: add SRAM based random seed 2018-07-04 17:55:20 +02:00
PeterKietzmann
20397c5b15 cortexm_common: add SRAM based PRNG seeder 2018-07-04 17:55:16 +02:00
Alexandre Abadie
f7922b9055 cpu/stm32l4: adapt for stm32l476vg 2018-07-04 09:19:46 +02:00
Alexandre Abadie
05c53a9216
Merge pull request #9435 from OTAkeys/pr/stm32f2_cpu_line 
cpu/stm32f2: make use of CPU_LINE
 2018-06-29 15:42:37 +02:00
Alexandre Abadie
5206446cf7
Merge pull request #9439 from OTAkeys/pr/stm32f3_cpu_line 
cpu/stm32f3: make use of CPU_LINE
 2018-06-29 15:42:17 +02:00
Alexandre Abadie
48d65d656f
Merge pull request #9441 from OTAkeys/pr/stm32f7_cpu_line 
cpu/stm32f7: make use of CPU_LINE
 2018-06-29 15:41:58 +02:00
Peter Kietzmann
8ab20f0551
Merge pull request #9456 from ZetaR60/RIOT_atmega_gpio_misc_fix 
cpu/atmega_common: misc gpio interrupt fixes
 2018-06-29 09:18:35 +02:00
Francisco Acosta
23d176f46b
Merge pull request #8857 from ZetaR60/RIOT_atmega_time_dot_h 
cpu/atmega_common: Use updated time.h
 2018-06-28 22:29:20 +02:00
Matthew Blue
adc44e6496 cpu/atmega_common: misc gpio interrupt fixes 2018-06-28 16:06:36 -04:00
Vincent Dupont
c93002351b cpu/stm32f7: make use of CPU_LINE 2018-06-27 10:38:46 -07:00
Vincent Dupont
d89fda5768 cpu/stm32f3: make use of CPU_LINE 2018-06-27 10:27:19 -07:00
Joakim Nohlgård
28fe4b8653 kinetis: Clean up SPI module power handling 
Fixes a problem with hardware CS when using slow SPI speeds,
mentioned in https://github.com/RIOT-OS/RIOT/issues/6437#issuecomment-283114795
 2018-06-27 19:21:39 +02:00
Vincent Dupont
48a360afff cpu/stm32f2: make use of CPU_LINE 2018-06-27 09:47:40 -07:00
Vincent Dupont
f4c01499c6
Merge pull request #9096 from OTAkeys/pr/stm32_cpu_line 
cpu/stm32: add CPU_LINE_* variable and use it for stm32f0 and stm32f4
 2018-06-27 00:21:02 -07:00
Marian Buschsieweke
80e448083e
cpu/msp430fxyz: Fixed input sanitizing in GPIO_PIN 2018-06-26 21:16:23 +02:00
Peter Kietzmann
aafb098a5e
Merge pull request #9413 from PeterKietzmann/pr_olegart_stm32l1_adc_clock 
cpu/stm32l1: fix ADC clock
 2018-06-26 16:56:48 +02:00
Oleg Artamonov
3f4752e91c cpu/stm32l1: fix ADC clock 2018-06-26 16:42:27 +02:00
Francisco Acosta
f0dce1b920
Merge pull request #8988 from Josar/atmega_isr 
cpu/atmega_common: __exit_isr thread_yield
 2018-06-26 16:12:39 +03:00
Hauke Petersen
7ffd6265bb cpu/nrf52: enable instruction cache 2018-06-22 16:09:23 +02:00
Peter Kietzmann
8724407686
Merge pull request #8958 from aabadie/pr/cpu/lm4f120 
cpu/lm4f120: remove useless periph file guard
 2018-06-22 13:27:23 +02:00
ZetaR60
7b8e3cbd01
Merge pull request #9340 from Josar/fix_gpio 
atmega_common/gpio.c: Fixes GPIO_LOW interrupt
 2018-06-21 14:08:52 -04:00
Andreas "Paul" Pauli
1aaeecf5b1
Merge pull request #9296 from maribu/lpc2387 
cpu/lpc2387: Various fixes for GPIO driver
 2018-06-21 19:28:53 +02:00
steffen
3ad71d5be0 atmega_common/gpio.c Fixes GPIO interrupt 
fixes the GPIO_LOW interrupt on the atmega platform.
It results from trying to shift GPIO_LOW. Since it is 0, it is not shiftable and will not be set correctly.
There were more issues with the other flanks too, as they are 0b01 or 0b00. If 0b11 was set as a flank before it would not be able to switch to any other mode anymore. Now the bits get cleared before the new flank will be written.
 2018-06-21 11:28:42 +02:00
Alexandre Abadie
5d633cd6d1 cpu/lm4f120: drop useless periph timer guards 2018-06-21 08:56:55 +02:00
Peter Kietzmann
6fd4009b89
Merge pull request #8957 from aabadie/pr/cpu/guard_lpc2387 
cpu/lpc2387: remove useless periph file guard
 2018-06-20 09:06:31 +02:00
Vincent Dupont
26cb3d8953 cpu/stm32f0: make use of CPU_LINE and STM32_FLASHSIZE 2018-06-19 14:31:23 +02:00
Vincent Dupont
e1ce7e5026 cpu/stm32_common: add STM32_FLASHSIZE constant 2018-06-19 14:31:23 +02:00
Vincent Dupont
d6d0f1a851 cpu/stm32f0: add custom CPU_LINE 2018-06-19 14:31:23 +02:00
Vincent Dupont
2e90eda456 cpu/stm32f4: make use of CPU_LINE_ variable 2018-06-19 14:22:48 +02:00
Vincent Dupont
4d7a195d33 cpu/stm32_common: add CPU_LINE_ variable 2018-06-19 14:22:46 +02:00
Marian Buschsieweke
1d0f90dcdf
cpu/lpc2387: Various fixes for GPIO driver 
- Fixed documentation
- Use bitwise operation instead of multiplication and addition in `GPIO_PIN()`
- Allow GPIOs to be configured as input via `gpio_init()`
- Fixed bugs in `gpio_init_mux`:
    - `0x01 << ((pin & 31) * 2)` was used before to generate the bitmask, but
      this would shift by 62 to the left. Correct is `0x01 << ((pin & 15) * 2)`
      (See [datasheet](https://www.nxp.com/docs/en/user-guide/UM10211.pdf) at
      pages 156ff)
    - Only one of the two bits was cleared previously
- Changed strategy to access GPIO pins:
    - Previous strategy:
        - Set all bits in FIOMASK except the one for the pin to control to
          disable access to them
        - Set/clear/read all pins in the target GPIO port (but access to all but
          the target pin is ignored because of the applied FIOMASK)
    - New strategy:
        - Set/clear/read only the target pin
    - Advantages:
        - Only one access to a GPIO register instead of two
        - Proven approach: Access to GPIOs on lpc2387 is mostly done by
          accessing the GPIO registers directy (e.g. see the sht11 driver).
          Those accesses never touch the FIOMASK register
        - No unwanted side effects: Disabling all but one pin in a GPIO port
          without undoing that seems not to be a good idea
 2018-06-18 09:10:25 +02:00
Josarn
91359631d5 cpu/atmega_common/thread_arch.c: uncrustified 2018-06-14 21:47:33 +02:00
Josarn
40c1839a8c cpu/atmega_common/periph/uart.c: uncrustified 2018-06-14 21:47:33 +02:00
Josarn
0e491861af cpu/atmega_common/periph/timer.c: uncrustified 2018-06-14 21:47:33 +02:00
Josarn
fe92771372 cpu/atmega_common/include/cpu.h: uncrustified 2018-06-14 21:47:33 +02:00
Josarn
9b631170cb cpu/atmega_common: uncrustified 2018-06-14 21:47:33 +02:00
Josarn
80b02e5268 cpu/atmega_common: exit_isr thread_yield 2018-06-14 21:47:33 +02:00
Alexandre Abadie
938677cc83 cpu*: fix doxygen grouping 2018-06-11 19:12:02 +02:00
Alexandre Abadie
4133908fe0 cpu/native: fix doxygen grouping 2018-06-11 19:12:02 +02:00
Juan Carrano
da85094b65 cpu/saml21: Fix possibly uninitialized variable in pm.c. 2018-06-11 18:35:41 +02:00
Simon Brummer
323a38819a native: Enforce safe strncpy usage in tap device setup 2018-06-10 17:16:46 +02:00
Hauke Petersen
e99010ac3e cpu/nrf5x: include nrfx.h compatibility header 2018-06-06 13:52:57 +02:00
Bas Stottelaar
0c47233f97 cpu: efm32: add support for non-standard UART modes. 2018-06-04 18:16:41 +02:00
Bas Stottelaar
c3161ce524 cpu/efm32: efm32pg12b: add support 2018-06-03 16:48:04 +02:00
Bas Stottelaar
9b3f8ca047 cpu/efm32: efm32pg12b: add vendor headers 2018-06-03 16:48:04 +02:00
Peter Kietzmann
b3ef51fb39
Merge pull request #9232 from maribu/lpc2387 
cpu/lpc2387: Fixed invalid call to send_msg in lpc2387-mci.c
 2018-06-01 08:11:25 +02:00
Francisco Acosta
7529133558
Merge pull request #9068 from aabadie/pr/stm32-common/fix_flashpage_m3 
cpu/stm32-common: slightly rework flashpage driver and fix iotlab-m3
 2018-05-30 17:50:20 +02:00