mirror of
https://github.com/RIOT-OS/RIOT.git
synced 2025-01-18 12:52:44 +01:00
Merge pull request #8988 from Josar/atmega_isr
cpu/atmega_common: __exit_isr thread_yield
This commit is contained in:
Francisco Acosta
GitHub
commit
f0dce1b920
@ -35,7 +35,8 @@
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#include <avr/interrupt.h>
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#include "cpu_conf.h"
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#include "sched.h"
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#include "thread.h"
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/**
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* For downwards compatibility with old RIOT code.
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* TODO: remove once core was adjusted
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@ -43,7 +44,8 @@
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#include "irq.h"
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#ifdef __cplusplus
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extern "C" {
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extern "C"
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{
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#endif
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/**
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@ -52,7 +54,7 @@ extern "C" {
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extern volatile uint8_t __in_isr;
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/**
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* @brief Flag entering of an ISR
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* @brief Run this code on entering interrupt routines
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*/
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static inline void __enter_isr(void)
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{
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@ -60,10 +62,22 @@ static inline void __enter_isr(void)
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}
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/**
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* @brief Flag exiting of an ISR
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* @brief Exit ISR mode and yield with a return from interrupt. Use at the
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* end of ISRs in place of thread_yield_higher. If thread_yield is needed, use
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* thread_yield followed by thread_yield_isr instead of thread_yield alone.
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*/
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void thread_yield_isr(void);
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/**
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* @brief Run this code on exiting interrupt routines
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*/
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static inline void __exit_isr(void)
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{
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if (sched_context_switch_request) {
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thread_yield();
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__in_isr = 0;
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thread_yield_isr();
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}
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__in_isr = 0;
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}
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@ -75,20 +89,20 @@ void cpu_init(void);
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/**
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* @brief Print the last instruction's address
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*/
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__attribute__((always_inline)) static inline void cpu_print_last_instruction(void)
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static inline void __attribute__((always_inline)) cpu_print_last_instruction(void)
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{
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uint8_t hi;
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uint8_t lo;
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uint16_t ptr;
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__asm__ volatile( "in __tmp_reg__, __SP_H__ \n\t"
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__asm__ volatile ("in __tmp_reg__, __SP_H__ \n\t"
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"mov %0, __tmp_reg__ \n\t"
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: "=g"(hi) );
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: "=g" (hi));
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__asm__ volatile( "in __tmp_reg__, __SP_L__ \n\t"
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__asm__ volatile ("in __tmp_reg__, __SP_L__ \n\t"
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"mov %0, __tmp_reg__ \n\t"
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: "=g"(lo) );
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ptr = hi<<8 | lo;
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: "=g" (lo));
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ptr = hi << 8 | lo;
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printf("Stack Pointer: 0x%04x\n", ptr);
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}
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@ -98,13 +112,13 @@ __attribute__((always_inline)) static inline void cpu_print_last_instruction(voi
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* Some CPUs may not support the highest prescaler settings
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*/
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enum {
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CPU_ATMEGA_CLK_SCALE_DIV1 = 0,
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CPU_ATMEGA_CLK_SCALE_DIV2 = 1,
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CPU_ATMEGA_CLK_SCALE_DIV4 = 2,
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CPU_ATMEGA_CLK_SCALE_DIV8 = 3,
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CPU_ATMEGA_CLK_SCALE_DIV16 = 4,
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CPU_ATMEGA_CLK_SCALE_DIV32 = 5,
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CPU_ATMEGA_CLK_SCALE_DIV64 = 6,
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CPU_ATMEGA_CLK_SCALE_DIV1 = 0,
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CPU_ATMEGA_CLK_SCALE_DIV2 = 1,
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CPU_ATMEGA_CLK_SCALE_DIV4 = 2,
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CPU_ATMEGA_CLK_SCALE_DIV8 = 3,
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CPU_ATMEGA_CLK_SCALE_DIV16 = 4,
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CPU_ATMEGA_CLK_SCALE_DIV32 = 5,
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CPU_ATMEGA_CLK_SCALE_DIV64 = 6,
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CPU_ATMEGA_CLK_SCALE_DIV128 = 7,
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CPU_ATMEGA_CLK_SCALE_DIV256 = 8,
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CPU_ATMEGA_CLK_SCALE_DIV512 = 9,
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@ -128,13 +142,6 @@ static inline void atmega_set_prescaler(uint8_t clk_scale)
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*/
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void atmega_stdio_init(void);
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/**
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* @brief Exit ISR mode and yield with a return from interrupt. Use at the
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* end of ISRs in place of thread_yield_higher. If thread_yield is needed, use
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* thread_yield followed by thread_yield_isr instead of thread_yield alone.
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*/
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void thread_yield_isr(void);
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#ifdef __cplusplus
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}
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#endif
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@ -29,18 +29,18 @@
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#include "periph/timer.h"
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#include "periph_conf.h"
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#define ENABLE_DEBUG (0)
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#define ENABLE_DEBUG (0)
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#include "debug.h"
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/**
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* @brief All timers have three channels
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*/
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#define CHANNELS (3)
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#define CHANNELS (3)
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/**
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* @brief We have 5 possible prescaler values
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*/
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#define PRESCALE_NUMOF (5U)
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#define PRESCALE_NUMOF (5U)
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/**
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* @brief Possible prescaler values, encoded as 2 ^ val
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@ -51,13 +51,13 @@ static const uint8_t prescalers[] = { 0, 3, 6, 8, 10 };
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* @brief Timer state context
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*/
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typedef struct {
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mega_timer_t *dev; /**< timer device */
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volatile uint8_t *mask; /**< address of interrupt mask register */
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volatile uint8_t *flag; /**< address of interrupt flag register */
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timer_cb_t cb; /**< interrupt callback */
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void *arg; /**< interrupt callback argument */
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uint8_t mode; /**< remember the configured mode */
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uint8_t isrs; /**< remember the interrupt state */
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mega_timer_t *dev; /**< timer device */
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volatile uint8_t *mask; /**< address of interrupt mask register */
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volatile uint8_t *flag; /**< address of interrupt flag register */
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timer_cb_t cb; /**< interrupt callback */
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void *arg; /**< interrupt callback argument */
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uint8_t mode; /**< remember the configured mode */
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uint8_t isrs; /**< remember the interrupt state */
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} ctx_t;
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/**
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@ -109,8 +109,8 @@ int timer_init(tim_t tim, unsigned long freq, timer_cb_t cb, void *arg)
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ctx[tim].dev->CNT = 0;
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/* save interrupt context and timer mode */
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ctx[tim].cb = cb;
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ctx[tim].arg = arg;
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ctx[tim].cb = cb;
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ctx[tim].arg = arg;
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ctx[tim].mode = (pre + 1);
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/* enable timer with calculated prescaler */
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@ -128,7 +128,7 @@ int timer_set_absolute(tim_t tim, int channel, unsigned int value)
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ctx[tim].dev->OCR[channel] = (uint16_t)value;
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*ctx[tim].flag &= ~(1 << (channel + OCF1A));
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*ctx[tim].mask |= (1 << (channel + OCIE1A));
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*ctx[tim].mask |= (1 << (channel + OCIE1A));
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return 1;
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}
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@ -167,11 +167,6 @@ static inline void _isr(tim_t tim, int chan)
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*ctx[tim].mask &= ~(1 << (chan + OCIE1A));
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ctx[tim].cb(ctx[tim].arg, chan);
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if (sched_context_switch_request) {
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thread_yield();
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thread_yield_isr();
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}
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__exit_isr();
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}
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#endif
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@ -192,8 +187,8 @@ ISR(TIMER_0_ISRC, ISR_BLOCK)
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{
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_isr(0, 2);
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}
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#endif /* TIMER_0_ISRC */
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#endif /* TIMER_0 */
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#endif /* TIMER_0_ISRC */
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#endif /* TIMER_0 */
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#ifdef TIMER_1
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ISR(TIMER_1_ISRA, ISR_BLOCK)
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@ -211,8 +206,8 @@ ISR(TIMER_1_ISRC, ISR_BLOCK)
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{
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_isr(1, 2);
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}
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#endif /* TIMER_1_ISRC */
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#endif /* TIMER_1 */
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#endif /* TIMER_1_ISRC */
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#endif /* TIMER_1 */
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#ifdef TIMER_2
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ISR(TIMER_2_ISRA, ISR_BLOCK)
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@ -35,7 +35,6 @@
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#include "periph/uart.h"
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/**
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* @brief Maximum percentage error in calculated baud before switching to
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* double speed transmission (U2X)
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@ -90,6 +89,7 @@ static void _update_brr(uart_t uart, uint16_t brr, bool double_speed)
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static void _set_brr(uart_t uart, uint32_t baudrate)
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{
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uint16_t brr;
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#if defined(UART_STDIO_BAUDRATE)
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/* UBRR_VALUE and USE_2X are statically computed from <util/setbaud.h> */
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if (baudrate == UART_STDIO_BAUDRATE) {
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@ -115,7 +115,7 @@ int uart_init(uart_t uart, uint32_t baudrate, uart_rx_cb_t rx_cb, void *arg)
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/* register interrupt context */
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isr_ctx[uart].rx_cb = rx_cb;
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isr_ctx[uart].arg = arg;
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isr_ctx[uart].arg = arg;
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/* disable and reset UART */
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dev[uart]->CSRB = 0;
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@ -134,14 +134,13 @@ int uart_init(uart_t uart, uint32_t baudrate, uart_rx_cb_t rx_cb, void *arg)
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dev[uart]->CSRB = (1 << TXEN0);
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}
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return UART_OK;
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}
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void uart_write(uart_t uart, const uint8_t *data, size_t len)
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{
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for (size_t i = 0; i < len; i++) {
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while (!(dev[uart]->CSRA & (1 << UDRE0))) {};
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while (!(dev[uart]->CSRA & (1 << UDRE0))) {}
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dev[uart]->DR = data[i];
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}
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}
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@ -160,46 +159,37 @@ void uart_poweroff(uart_t uart)
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static inline void isr_handler(int num)
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{
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__enter_isr();
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isr_ctx[num].rx_cb(isr_ctx[num].arg, dev[num]->DR);
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if (sched_context_switch_request) {
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thread_yield();
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thread_yield_isr();
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}
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__exit_isr();
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}
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#ifdef UART_0_ISR
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ISR(UART_0_ISR, ISR_BLOCK)
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{
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__enter_isr();
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isr_handler(0);
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__exit_isr();
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}
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#endif /* UART_0_ISR */
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#ifdef UART_1_ISR
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ISR(UART_1_ISR, ISR_BLOCK)
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{
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__enter_isr();
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isr_handler(1);
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__exit_isr();
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}
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#endif /* UART_1_ISR */
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#ifdef UART_2_ISR
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ISR(UART_2_ISR, ISR_BLOCK)
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{
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__enter_isr();
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isr_handler(2);
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__exit_isr();
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}
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#endif /* UART_2_ISR */
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#ifdef UART_3_ISR
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ISR(UART_3_ISR, ISR_BLOCK)
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{
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__enter_isr();
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isr_handler(3);
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__exit_isr();
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}
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#endif /* UART_3_ISR */
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@ -28,7 +28,6 @@
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#include "cpu.h"
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#include "board.h"
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/*
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* local function declarations (prefixed with __)
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*/
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@ -69,7 +68,7 @@ static void __enter_thread_mode(void);
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* if task_func returns sched_task_exit gets popped into the PC
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*/
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char *thread_stack_init(thread_task_func_t task_func, void *arg,
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void *stack_start, int stack_size)
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void *stack_start, int stack_size)
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{
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uint16_t tmp_adress;
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uint8_t *stk;
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@ -79,59 +78,58 @@ char *thread_stack_init(thread_task_func_t task_func, void *arg,
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/* put marker on stack */
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stk--;
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*stk = (uint8_t) 0xAF;
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*stk = (uint8_t)0xAF;
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stk--;
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*stk = (uint8_t) 0xFE;
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*stk = (uint8_t)0xFE;
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/* save sched_task_exit */
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stk--;
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tmp_adress = (uint16_t) sched_task_exit;
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*stk = (uint8_t)(tmp_adress & (uint16_t) 0x00ff);
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tmp_adress = (uint16_t)sched_task_exit;
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*stk = (uint8_t)(tmp_adress & (uint16_t)0x00ff);
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stk--;
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tmp_adress >>= 8;
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*stk = (uint8_t)(tmp_adress & (uint16_t) 0x00ff);
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*stk = (uint8_t)(tmp_adress & (uint16_t)0x00ff);
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#if FLASHEND > 0x1ffff
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/* Devices with more than 128kb FLASH use a 17 bit PC, we set whole the top byte forcibly to 0 */
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stk--;
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*stk = (uint8_t) 0x00;
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*stk = (uint8_t)0x00;
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#endif
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/* save address to task_func in place of the program counter */
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stk--;
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tmp_adress = (uint16_t) task_func;
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*stk = (uint8_t)(tmp_adress & (uint16_t) 0x00ff);
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tmp_adress = (uint16_t)task_func;
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*stk = (uint8_t)(tmp_adress & (uint16_t)0x00ff);
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stk--;
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tmp_adress >>= 8;
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*stk = (uint8_t)(tmp_adress & (uint16_t) 0x00ff);
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*stk = (uint8_t)(tmp_adress & (uint16_t)0x00ff);
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#if FLASHEND > 0x1ffff
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/* Devices with more than 128kb FLASH use a 17 bit PC, we set whole the top byte forcibly to 0 */
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stk--;
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*stk = (uint8_t) 0x00;
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*stk = (uint8_t)0x00;
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#endif
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/* r0 */
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stk--;
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*stk = (uint8_t) 0x00;
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*stk = (uint8_t)0x00;
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/* status register (with interrupts enabled) */
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stk--;
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*stk = (uint8_t) 0x80;
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*stk = (uint8_t)0x80;
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#if defined(EIND)
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stk--;
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*stk = (uint8_t) 0x00;
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*stk = (uint8_t)0x00;
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#endif
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#if defined(RAMPZ)
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stk--;
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*stk = (uint8_t) 0x00;
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*stk = (uint8_t)0x00;
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#endif
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/* r1 - has always to be 0 */
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stk--;
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*stk = (uint8_t) 0x00;
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*stk = (uint8_t)0x00;
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/*
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* Space for registers r2 -r23
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*
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@ -140,9 +138,9 @@ char *thread_stack_init(thread_task_func_t task_func, void *arg,
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int i;
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for (i = 2; i <= 23 ; i++) {
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for (i = 2; i <= 23; i++) {
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stk--;
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*stk = (uint8_t) 0;
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*stk = (uint8_t)0;
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}
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/*
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@ -150,22 +148,22 @@ char *thread_stack_init(thread_task_func_t task_func, void *arg,
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* r24 and r25
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* */
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stk--;
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tmp_adress = (uint16_t) arg;
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*stk = (uint8_t)(tmp_adress & (uint16_t) 0x00ff);
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tmp_adress = (uint16_t)arg;
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*stk = (uint8_t)(tmp_adress & (uint16_t)0x00ff);
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stk--;
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tmp_adress >>= 8;
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*stk = (uint8_t)(tmp_adress & (uint16_t) 0x00ff);
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*stk = (uint8_t)(tmp_adress & (uint16_t)0x00ff);
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/*
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* Space for registers r26-r31
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*/
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for (i = 26; i <= 31; i++) {
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stk--;
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*stk = (uint8_t) i;
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*stk = (uint8_t)i;
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}
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stk--;
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return (char *) stk;
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return (char *)stk;
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}
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/**
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@ -178,7 +176,7 @@ char *thread_stack_init(thread_task_func_t task_func, void *arg,
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*/
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void thread_stack_print(void)
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{
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uint8_t found_marker = 1;
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uint8_t found_marker = 1;
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uint8_t *sp = (uint8_t *)sched_active_thread->sp;
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uint16_t size = 0;
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@ -193,8 +191,7 @@ void thread_stack_print(void)
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if ((*sp == 0xFE) && (*(sp + 1) == 0xAF)) {
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found_marker = 0;
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}
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}
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while (found_marker == 1);
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} while (found_marker == 1);
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printf("stack size: %u bytes\n", size);
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}
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@ -209,41 +206,41 @@ void cpu_switch_context_exit(void)
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/**
|
||||
* @brief Set the MCU into Thread-Mode and load the initial task from the stack and run it
|
||||
*/
|
||||
|
||||
void NORETURN __enter_thread_mode(void) __attribute__((naked));
|
||||
void NORETURN __enter_thread_mode(void)
|
||||
{
|
||||
irq_enable();
|
||||
__context_restore();
|
||||
__asm__ volatile("ret");
|
||||
__asm__ volatile ("ret");
|
||||
|
||||
UNREACHABLE();
|
||||
}
|
||||
|
||||
void thread_yield_higher(void) {
|
||||
void thread_yield_higher(void)
|
||||
{
|
||||
if (irq_is_in() == 0) {
|
||||
__context_save();
|
||||
sched_run();
|
||||
__context_restore();
|
||||
__asm__ volatile("ret");
|
||||
} else {
|
||||
__asm__ volatile ("ret");
|
||||
}
|
||||
else {
|
||||
sched_context_switch_request = 1;
|
||||
}
|
||||
}
|
||||
|
||||
void thread_yield_isr(void) {
|
||||
void thread_yield_isr(void)
|
||||
{
|
||||
__context_save();
|
||||
sched_run();
|
||||
__context_restore();
|
||||
|
||||
__exit_isr();
|
||||
|
||||
__asm__ volatile("reti");
|
||||
__asm__ volatile ("reti");
|
||||
}
|
||||
|
||||
__attribute__((always_inline)) static inline void __context_save(void)
|
||||
{
|
||||
__asm__ volatile(
|
||||
__asm__ volatile (
|
||||
"push __tmp_reg__ \n\t"
|
||||
"in __tmp_reg__, __SREG__ \n\t"
|
||||
"cli \n\t"
|
||||
@ -293,14 +290,12 @@ __attribute__((always_inline)) static inline void __context_save(void)
|
||||
"in __tmp_reg__, __SP_L__ \n\t"
|
||||
"st x+, __tmp_reg__ \n\t"
|
||||
"in __tmp_reg__, __SP_H__ \n\t"
|
||||
"st x+, __tmp_reg__ \n\t"
|
||||
);
|
||||
|
||||
"st x+, __tmp_reg__ \n\t");
|
||||
}
|
||||
|
||||
__attribute__((always_inline)) static inline void __context_restore(void)
|
||||
{
|
||||
__asm__ volatile(
|
||||
__asm__ volatile (
|
||||
"lds r26, sched_active_thread \n\t"
|
||||
"lds r27, sched_active_thread + 1 \n\t"
|
||||
"ld r28, x+ \n\t"
|
||||
@ -348,6 +343,5 @@ __attribute__((always_inline)) static inline void __context_restore(void)
|
||||
#endif
|
||||
"pop __tmp_reg__ \n\t"
|
||||
"out __SREG__, __tmp_reg__ \n\t"
|
||||
"pop __tmp_reg__ \n\t"
|
||||
);
|
||||
"pop __tmp_reg__ \n\t");
|
||||
}
|
||||
|
||||
Loading…
Reference in New Issue
Block a user