krzysztof-cabaj
cfd0183f60
boards/nucleo-f207zg: add ADC support
2022-11-04 18:02:28 -04:00
Fabian Hüßler
9163d78910
boards: add VBAT for stm32 based boards with ADC
2022-02-21 10:49:43 +01:00
Benjamin Valentin
0ed34cdb4d
cpu/stm32: periph_eth: drop addr from eth_conf_t
...
MAC address is now supplied by EUI provider, no need to hard-code
it for the board.
2020-11-29 23:11:14 +01:00
39e06babf5
boards/stm32: use generic clk_conf.h header
2020-10-27 08:44:56 +01:00
Marian Buschsieweke
bedddce263
boards/nucleo-{f207zg,f746zg,f767zi}: periph_eth
...
Use shared MII register definitions from mii.h rather than own definitions.
2020-10-12 08:46:20 +02:00
Marian Buschsieweke
a30872bec1
boards/nucleo-{f207zg,f746zg,f767zi}: periph_conf
...
Fix PHY address in eth_config. It should be 0 for these boards, not 1. This is
why previously the link status read out worked with an hard code PHY address
0 before.
Some dubious references for 0 being the correct PHY address and not 1 (in
absence of proper references):
https://www.carminenoviello.com/2016/01/22/getting-started-stm32-nucleo-f746zg/
https://community.st.com/s/question/0D50X00009XkgfISAR/stm32f767-nucleo-ethernet-not-working
2020-10-09 20:20:54 +02:00
8625e33d78
boards/nucleo-f207zg: use new clock configuration scheme
2020-10-06 16:10:05 +02:00
Marian Buschsieweke
fdeb5d7eda
boards/nucleo-{f207zg,f756zg,f767zi}: Update periph_conf.h
...
Rename `mac` --> `addr` (as done in header)
2020-10-05 16:04:25 +02:00
hugues
2179e38fa8
boards/nucleo-f207zg: declare adc_config[] directly in periph_conf.h
2020-08-27 03:56:26 +02:00
ce05711498
nucleo-f207zg: remove obsolete spi_divtable
2020-08-18 16:55:04 +02:00
Marian Buschsieweke
51fe77afa4
cpu/stm32/periph_eth: configurable buffer size
...
1. Move buffer configuration from boards to cpu/stm32
2. Allow overwriting buffer configuration
- If the default configuration ever needs touching, this will be due to a
use case and should be done by the application rather than the board
3. Reduce default RX buffer size
- Now that handling of frames split up into multiple DMA descriptors works,
we can make use of this
Note: With the significantly smaller RX buffers the driver will now perform
much worse when receiving data at maximum throughput. But as long as frames
are small (which is to be expected for IoT or boarder gateway scenarios) the
performance should not be affected.
2020-08-17 20:29:29 +02:00
97f98dcace
boards/stm32: remove useless ifdef around DMA config
2020-05-25 13:23:20 +02:00
3280248e89
nucleo-f207zg: add usbdev feature
2020-02-11 15:50:18 +01:00
Wouter
3072900ed6
boards/nucleo-f207zg: add Ethernet config
2019-11-26 11:11:41 +01:00
Yannick Gicquel
d37adee32d
boards/stm32-based: allow SPI signals routed on multiple alternate functions
...
There is no hardware limitation for custom boards based on STM32 to uses
SPI bus with signals coming from different PORT and alternate functions.
This patch allow alternate's function definition per pin basis, thus enable
the support of SPI bus signals routed on differents PORT.
Signed-off-by: Yannick Gicquel <ygicquel@gmail.com>
2019-10-25 06:27:41 +02:00
Benjamin Valentin
8af04cd939
boards: make use of ARRAY_SIZE macro
2019-08-06 19:43:54 +02:00
7853ca0108
boards/stm32*: remove useless RTC_NUMOF defines
2019-08-05 11:08:53 +02:00
3a5c9cb921
boards/nucleo-f207zg: configure and use DMA
2019-01-08 09:32:18 +01:00
3eba44a660
boards/nucleo-f0207zg: use common clock and i2c configuration
2019-01-02 14:29:26 +01:00
Kevin Weiss
8468fe1c94
Merge pull request #8516 from jia200x/wiki_dox_convertion
...
doc: move wiki to Doxygen documentation (second attempt)
2018-08-07 13:27:04 +02:00
Jose Alamos
2531487fca
boards/periph_conf: fix Doxygen group directives
2018-08-01 15:24:55 +02:00
27d2841a60
boards/nucleo-f207zg: use new style for i2c config
2018-07-25 12:01:36 +02:00
8d0815d386
boards: rename nucleo144-f207 to nucleo-f207zg
2018-01-29 22:14:25 +01:00
