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Commit Graph

11 Commits

Author SHA1 Message Date
Gunar Schorcht
26030e28af boards: remove extern mtd_dev_t* Declarations 2023-12-07 15:32:49 +01:00
Marian Buschsieweke
8e8f424922
boards/qn9080dk: fix periph conflict
- Document which I2C/SPI/UART peripheral maps to which FLEXCONN IP
  block to easily detect potential overlap
- Switch conflict between SPI and I2C peripheral by using a different
  FLEXCONN for I2C
2023-06-12 21:10:27 +02:00
Benjamin Valentin
5d111e71aa boards: drop board_init() from board.h 2022-02-25 15:08:58 +01:00
d755c3ae4a
boards/qn9080dk: move CLOCK_CORECLOCK definition to periph_conf.h 2021-12-15 13:14:19 +01:00
iosabi
4fb4f03252 boards/qn9080dk: Add SPI NOR flash definition
The QN9080-DK board has a 2 Mbit MX25R2035F SPI NOR flash connected to
SPI0. This patch adds the flash definition to the board.
2021-01-31 16:27:22 +00:00
iosabi
cde5d91018 boards/qn9080dk: Configure the SPI bus.
The SPI0 (FLEXCOMM2) is connected to a 2 Mb (256 KB) NAND flash
MX25R2035F in the board. This patch configures the SPI bus with the
CS line used for this flash chip.
2021-01-31 16:27:22 +00:00
iosabi
e72049a180 boards/qn9080dk: Add ADC configuration
The QN9080DK board has 6 Analog Input lines in the J6 header, labeled
"A0" to "A5". This configuration enables these lines as ADC lines 0 to 5
as well as some other channel options available as lines 6 and up.
2021-01-30 17:25:09 +00:00
iosabi
5f78519b29 boards/qn9080dk: Enable driver for I2C0
The QN9080DK board can expose the I2C bus SDA and SCL in the pins
labeled D14 and D15 respectively in the J5 headers, and in the Pmod (J8)
connector in the pins 10 and 9 of the header respectively.

The bus has a 2K2 pull up resistor on each line when SB7 and SB8 (next
to the Pmod connector) are closed, which is the factory default.
2020-12-19 22:41:57 +00:00
iosabi
ef4b58f4f0 cpu/qn908x: Add timer driver based on CTIMER.
The QN908x CPU has several timer modules: one RTC (Real-Time Clock) that
can count from the 32kHz internal clock or 32.768 kHz external clock,
four CTIMER that use the APB clock and have four channels each and one
SCT timer with up to 10 channels running on the AHB clock.

This patch implements a timer driver for the CTIMER blocks only, which
is enough to make the xtimer module work. Future patches should improve
on this module to support using the RTC CNT2 32-bit free-running
counter unit and/or the SCT timer.
2020-12-04 23:18:27 +01:00
iosabi
bd929a3746 cpu/qn908x: Add support for UART.
The QN908x has four FLEXCOMM interfaces that support a subset of UART,
SPI or I2C each one. This patch adds generic support for dealing with
the FLEXCOMM initialization and interrupts and adds a driver for
RX/TX support in UART.

With this patch is now possible to use a shell on the device over UART.
2020-12-03 20:53:49 +01:00
iosabi
cc6adbb39d boards/qn9080dk: New board for the QN908x
The QN9080DK is the developer board reference from NXP for the QN908x
CPUs. The developer kit comes with two boards: a larger PCB with many
peripherals and a much smaller "USB dongle". This board adds initial
support for the larger "DK board". At the moment, with the minimal CPU
support this board only configures the GPIOs available in the board,
namely the RGB LED and the two user buttons.
2020-12-02 02:47:07 +00:00