boards/qn9080dk: Configure the SPI bus.

The SPI0 (FLEXCOMM2) is connected to a 2 Mb (256 KB) NAND flash
MX25R2035F in the board. This patch configures the SPI bus with the
CS line used for this flash chip.

boards/qn9080dk/Kconfig

@@ -19,6 +19,7 @@ config BOARD_QN9080DK
     select BOARD_HAS_XTAL_32M
     select HAS_PERIPH_ADC
     select HAS_PERIPH_I2C
+    select HAS_PERIPH_SPI
     select HAS_PERIPH_TIMER
     select HAS_PERIPH_UART
     select HAS_PERIPH_UART_MODECFG

boards/qn9080dk/Makefile.features

@@ -5,6 +5,7 @@ CPU_MODEL = qn9080xhn
 FEATURES_PROVIDED += periph_adc
 FEATURES_PROVIDED += periph_gpio periph_gpio_irq
 FEATURES_PROVIDED += periph_i2c
+FEATURES_PROVIDED += periph_spi
 FEATURES_PROVIDED += periph_timer
 FEATURES_PROVIDED += periph_uart periph_uart_modecfg
 

boards/qn9080dk/include/periph_conf.h

@@ -66,6 +66,28 @@ static const i2c_conf_t i2c_config[] = {
 #define I2C_NUMOF           ARRAY_SIZE(i2c_config)
 /** @} */
 
+/**
+ * @name   SPI configuration
+ * @{
+ */
+static const spi_conf_t spi_config[] = {
+    {
+        .dev            = SPI0,  /* Flexcomm 2 */
+        .cipo_pin       = GPIO_PIN(PORT_A, 5),
+        .copi_pin       = GPIO_PIN(PORT_A, 4),
+        .clk_pin        = GPIO_PIN(PORT_A, 30),
+        .cs_pin         = {
+            GPIO_PIN(PORT_A, 3),  /* MX25R2035F CS# connected here. */
+            GPIO_UNDEF,
+            GPIO_UNDEF,
+            GPIO_UNDEF
+        },
+    },
+};
+
+#define SPI_NUMOF           ARRAY_SIZE(spi_config)
+/** @} */
+
 /**
  * @name   UART configuration
  * @{