19730: boards/qn9080dk: fix periph conflict r=maribu a=maribu
### Contribution description
- Document which I2C/SPI/UART peripheral maps to which FLEXCONN IP block to easily detect potential overlap
- Switch conflict between SPI and I2C peripheral by using a different FLEXCONN for I2C
19731: boards/qn9080dk: update doc on flashing r=maribu a=maribu
### Contribution description
- update the doc on the internal programmer firmware:
- not only switching to J-Link, but also just updating it does improve reliability of flashing
- give hints in how to get the ~~shitty~~ wonderful update process working
- update notes on OpenOCD requirements
Co-authored-by: Marian Buschsieweke <marian.buschsieweke@posteo.net>
- update the doc on the internal programmer firmware:
- not only switching to J-Link, but also just updating it does
improve reliability of flashing
- give hints in how to get the ~~shitty~~ wonderful update process
working
- update notes on OpenOCD requirements
- Document which I2C/SPI/UART peripheral maps to which FLEXCONN IP
block to easily detect potential overlap
- Switch conflict between SPI and I2C peripheral by using a different
FLEXCONN for I2C
- document that the QN9080DK has an alternative firmware for the
debugger/programmer that supports J-Link
- allow selecting the debugger firmware via parameter / environment
variable
- add `JLINK_DEVICE` parameter to allow flashing via J-Link
With `MOST_RECENT_PORT=1` the TTY interface of the most recently
connected board with an embedded NXP debugger is selected. If only
a single board with an embedded NXP debugger is selected, this will
automatically connect to the correct board using:
```
make term MOST_RECENT_PORT=1
```
The SPI0 (FLEXCOMM2) is connected to a 2 Mb (256 KB) NAND flash
MX25R2035F in the board. This patch configures the SPI bus with the
CS line used for this flash chip.
The QN9080DK board has 6 Analog Input lines in the J6 header, labeled
"A0" to "A5". This configuration enables these lines as ADC lines 0 to 5
as well as some other channel options available as lines 6 and up.
The qn9080dk includes a MMA8652FC chip connected to the I2C0 bus, this
patch adds the driver for the in the default.
Note that the MMA8652FC device is powered from the LPC_VCC line, which
is different from the QN_VCC line that powers the QN9080 MCU. A voltage
level translator is included in the QN9080DK which is only enabled when
JP11 (labeled "G-Sensor I2C") is closed and the LPC debugger hardware
is powered, for example from the USB port.
The QN9080DK board can expose the I2C bus SDA and SCL in the pins
labeled D14 and D15 respectively in the J5 headers, and in the Pmod (J8)
connector in the pins 10 and 9 of the header respectively.
The bus has a 2K2 pull up resistor on each line when SB7 and SB8 (next
to the Pmod connector) are closed, which is the factory default.
The QN908x CPU has several timer modules: one RTC (Real-Time Clock) that
can count from the 32kHz internal clock or 32.768 kHz external clock,
four CTIMER that use the APB clock and have four channels each and one
SCT timer with up to 10 channels running on the AHB clock.
This patch implements a timer driver for the CTIMER blocks only, which
is enough to make the xtimer module work. Future patches should improve
on this module to support using the RTC CNT2 32-bit free-running
counter unit and/or the SCT timer.
The QN908x has four FLEXCOMM interfaces that support a subset of UART,
SPI or I2C each one. This patch adds generic support for dealing with
the FLEXCOMM initialization and interrupts and adds a driver for
RX/TX support in UART.
With this patch is now possible to use a shell on the device over UART.
The QN9080DK is the developer board reference from NXP for the QN908x
CPUs. The developer kit comes with two boards: a larger PCB with many
peripherals and a much smaller "USB dongle". This board adds initial
support for the larger "DK board". At the moment, with the minimal CPU
support this board only configures the GPIOs available in the board,
namely the RGB LED and the two user buttons.
