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Code Releases Activity
26,348 Commits 40 Branches 189 Tags 262 MiB
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68 Commits

Author SHA1 Message Date
Marian Buschsieweke
314184adb5
cpu: Platform specific C11 atomics compat headers 
Added headers to define platform specific sizes and types for the C11 atomics
compatibility module for C++.
 2019-10-24 23:08:36 +02:00
Kaspar Schleiser
a7f6508109 cpu/cortexm: don't disable IRQs in cpu_jump_to_image() 2019-09-26 23:38:43 +02:00
Francisco Molina
d075e55bb4 cpu/cortexm_common: replace irq_restore by __set_PRIMASK for stm32l152re 
- The __NOP() that was added in #8518 is now remooved.
- When DBG_STANDBY, DBG_STOP or DBG_SLEEP are set in DBG_CR a hardfault
  occurs on wakeup from sleep. This was first diagnosed in #8518. When
  enabled, a hardfault occured when returning from a branch to irq_restore()
  we avoid the call by inlining the function call. See #11830 for more
  details.
 2019-08-05 10:40:28 +02:00
Oleg Artamonov
a5ce6deb02 cpu/cortexm_common: function to check address validity 2019-05-13 09:35:34 +02:00
emmanuelsearch
61c793aa4c cpu/cortexm_common: Add image_baseaddr support for Cortex-M23 2019-03-26 11:46:00 +01:00
Dylan Laduranty
fdcac731eb cpu/cortexm_common: Update ARM CMSIS to V5.4.0 
Signed-off-by: Dylan Laduranty <dylan.laduranty@mesotic.com>
 2019-01-15 17:35:40 +01:00
Kaspar Schleiser
9cfdf6e379 cpu/cortexm_common: introduce cpu_jump_to_image() 
This new function allows to jump to another execution
environment (VTOR) located at a certain (aligned) address.
It's used to boot firmwares at another location than
`CPU_FLASH_BASE`.

The user needs to ensure that the CPU using this feature
is able to be initialised at least twice while jumping
to the RIOT `reset_handler_default` function, since it
initialises the CPU again (calls cpu_init()).

Co-authored-by: Kaspar Schleiser <kaspar@schleiser.de>
 2018-12-18 19:31:35 +01:00
PeterKietzmann
0be350e352 sys/puf_sram: CPU specific attributes for variables 2018-11-20 08:34:53 +01:00
Pekka Nikander
6aa0a48558 cpu/cortexm_common/cortexm_init: Allow piecewise calling 
Refactor cortexm_init to allow bits and pieces of
   it to be called separately, while retaining the
   current API, too.  Needed for non-standard
   Cortex-M initialisation, such as with nRF52
   SoftDevice.
 2018-08-28 14:07:50 +03:00
Kaspar Schleiser
c9c7cd4951 cpu: cortexm_common: use thread_yield_higher() in cortexm_isr_end() 2018-04-13 10:12:39 +02:00
Francisco Acosta
ac9328381c cpu/cortexm_common: add NOP after WFI to avoid hardfault on stm32l152 2018-02-12 15:10:34 +01:00
Kaspar Schleiser
99d484f336 cpu/cortexm_common: select bitarithm_lsb() by available instructions 2018-01-16 23:35:14 +01:00
Joakim Nohlgård
e3d5a70e0c cpu/cortexm: Remove leftover _estack declarations 
These are leftovers from before the Cortex-M common ISR vectors were
split into vectors_cortexm.c
 2017-11-10 15:38:14 +01:00
Hauke Petersen
5920d99752 pm: fix weak-based default implementations 
Instead of using `weak` function definitions, this PR handles
default implementations using `PROVIDES_x` defines, allowing
for cpus/pm realted modules to use their own implementations.
 2017-10-16 14:27:35 +02:00
Vincent Dupont
dd49f22532 cpu/cortexm_common: use irq_disable/irq_restore 2017-10-06 17:40:47 +02:00
Hauke Petersen
3ede8e9d95 cpu: force size of CPU specific vector table 2017-09-04 15:13:43 +02:00
Hauke Petersen
1a20ef8223 cpu: unified cortex-m base interrupt vector 2017-09-04 15:13:32 +02:00
Joakim Nohlgård
dc3aa13e90 cortexm_common: Introduce bitbanding macros 2017-06-09 05:19:13 +02:00
Kaspar Schleiser
0fcc7d3834 cleanup: apply headerguard script output 2017-05-24 17:54:02 +02:00
Hauke Petersen
10a7486246 cpu/cortex_common: added support for Cortex-M7 2017-05-08 09:16:11 +02:00
Hauke Petersen
f875c3efc2 cpu/cortexm: s/cpu_sleep_until_.../cortexm_sle.../ 2017-05-04 13:45:11 +02:00
Hauke Petersen
37d4f44379 cpus: mv vendor headers to include/vendor/. 2017-03-07 08:55:15 +01:00
Joakim Nohlgård
20b184604b cortexm_common: Remove atomic_arch 2017-02-08 16:23:49 +01:00
Hauke Petersen
3da9ceb705 cpu/cortexm: fixed cortexm_sleep() 2017-01-27 13:00:24 +01:00
Kaspar Schleiser
be7771e0b9 cpu: cortexm_common: add define for number of non-isr exceptions 2017-01-25 10:22:03 +01:00
Oleg Hahm
7ee7801c10 *: remove trailing underscores from header guards 2017-01-19 18:30:53 +01:00
Hauke Petersen
ed5d7ac0fd cpu/cortexm: added shared cortexm_sleep() function 2017-01-13 12:26:42 +01:00
Hauke Petersen
04b246cb01 cpu/cortexm_common: added cortexm_isr_end() function 2016-12-21 11:27:46 +01:00
zhuoshuguo
a60fa5b8d3 cpu/cortexm_common: fix include guards. 2016-11-16 11:45:03 +01:00
Ian Martin
b7bd6b3479 cpu/cortexm_common: add Memory Protection Unit (MPU) driver 2016-10-19 11:12:36 -04:00
zhuoshuguo
1cbe79a373 CPU: fix include header guards 
Fix cpu/lpc2387/include/lpc2387.h
 2016-06-08 16:38:20 +02:00
Martine Lenders
9b1ad7820c Merge pull request #5491 from MohmadAyman/isr_stack_usage 
cpu: add capability to show stack usage of ISR
 2016-06-02 12:31:06 +02:00
MohmadAyman
53df3e8b57 core: cpu: provide function to acquire ISR stack usage 2016-06-01 23:01:35 +02:00
Joakim Nohlgård
9ad9f400e6 cpu/cortexm_common: Remove register keyword from variables 
register is deprecated when building C++11 code and removed in C++17,
using it will cause build failures with C++ and -Werror. The register
hint keyword is likely ignored in GCC anyway.
 2016-06-01 16:12:38 +02:00
DipSwitch
64b3957323 cpu/cortexm_common: Fix cpu_sleep_until_event() 2016-03-16 00:23:50 +01:00
Joakim Nohlgård
d8b01a714c cpu/cortexm_common: Doxygen fix for cmsis_gcc.h 2016-03-14 22:16:52 +01:00
Joakim Nohlgård
61c9ba2c64 cpu/cortexm_common: Whitespace fix CMSIS header 2016-03-14 22:08:33 +01:00
Joakim Gebart
bea6cb9f15 cortexm: CMSIS: Add extern "C" to CMSIS headers 2016-03-14 22:05:57 +01:00
Joakim Nohlgård
26f43786b8 cpu/cortexm_common: Update CMSIS v4.5 
Original headers unmodified from CMSIS-SP-00300-r4p5-00rel0.zip
 2016-03-14 18:16:36 +01:00
Kaspar Schleiser
6881f65f46 cpu: cortexm*: move cpu_conf.h stuff from cpu.h into cpu_conf_common.h 2016-03-05 18:20:17 +01:00
Hauke Petersen
eb79646ab1 cpu/cortexm_common: added sleep_until_event 2016-03-01 23:22:03 +01:00
Oleg Hahm
f24e810de5 cpu cortexm_common: fix pedantic compiler warnings 2015-12-07 20:28:52 +01:00
Hauke Petersen
cf11b073d6 cpu/cortexm_common: define ISR stacksize in cpu.h 2015-11-19 11:55:35 +01:00
Joakim Nohlgård
a5449bcbd4 cpu/cortexm_common: only set naked attribute on DEVELHELP hardfault handler 
Fixes error on LLVM/Clang:

   cpu/cortexm_common/vectors_cortexm.c:287:5: error: non-ASM statement in naked function is not supported
       core_panic(PANIC_HARD_FAULT, "HARD FAULT HANDLER");
       ^
   cpu/cortexm_common/include/vectors_cortexm.h:65:46: note: attribute is here
   void hard_fault_default(void) __attribute__((naked));
                                                ^
   1 error generated.
 2015-10-28 06:51:51 +01:00
Kaspar Schleiser
effb15a2cc Merge pull request #3313 from gebart/pr/eINT-fixes 
eINT/dINT fixes
 2015-09-29 12:39:16 +02:00
Joakim Nohlgård
98c465008b all: Update @gebart family name, email 2015-09-20 13:47:39 +02:00
Joakim Gebart
b6a88cba5f cpu/cortexm_common: remove dINT/eINT definitions 2015-09-19 10:37:17 +02:00
Martine Lenders
93f555ef69 Merge pull request #3782 from OlegHahm/RIOT_assert 
core: RIOT's own assert macro
 2015-09-12 13:12:34 +02:00
Oleg Hahm
f3245cecac core: panic: last instruction's address for assert 2015-09-11 23:23:31 +02:00
Oleg Hahm
d7161b6d4b cpu: inline function to print instruction register 2015-09-11 23:23:31 +02:00