Marian Buschsieweke
dbd241ef26
cpu/stm32/periph_ptp: update to new API
2021-02-10 10:09:26 +01:00
Francisco Molina
85caf7cbc7
drivers/flashpage: add FLASHPAGE_ERASE_STATE definition
2021-02-09 11:11:46 +01:00
b666b78602
Merge pull request #15914 from fjmolinas/pr_stm32_flashpage_fix_per
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cpu/stm32/flashpage: reset PER after erase
2021-02-03 10:21:04 +01:00
Francisco
3b2a55a923
Merge pull request #15865 from benpicco/pm_layered-default
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cpu: make pm_layered a DEFAULT_MODULE
2021-02-03 08:17:29 +01:00
Francisco Molina
3d68406c5b
cpu/stm32/flashpage: reset PER after erase
2021-02-02 11:42:09 +01:00
benpicco
837b55fc17
Merge pull request #15420 from bergzand/pr/stm32f4/flashpage_support
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stm32f{2,4,7}: Initial flashpage support
2021-02-01 19:23:51 +01:00
b6e80bf487
stm32f4: Initial flashpage support
2021-02-01 18:23:05 +01:00
benpicco
efd8afd3ab
Merge pull request #15899 from OTAkeys/pr/stm32-fix-exti
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cpu/stm32/gpio: fix EXTI flag clearing
2021-02-01 18:22:25 +01:00
Vincent Dupont
3e8e109e8b
cpu/stm32/gpio: fix EXTI flag clearing
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In case a non-gpio EXTI (>= 16) is pending, the isr_exti() used to clear
the flag and try to call a callback, which was out-of-bouds, thus
generating a hard fault.
This fixes it by masking the pending_isr variables with 0xFFFF.
2021-02-01 13:30:48 +01:00
118643ab2d
stm32: Resolve RAM size to bytes
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The ram size is exposed as macro value and available for use in code.
For the stm32 it has a value in kilobytes suffixed with 'k'. This is
less than optimal for usage in arithmetic. This commit modifies the
value to bytes so that it can be used in preprocessor magic
2021-02-01 10:53:40 +01:00
Benjamin Valentin
f12a82e4f9
cpu/stm32: use common pm_off() function
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The code is identical to the one found in sys/pm_layered/pm.c
2021-01-27 14:07:22 +01:00
Benjamin Valentin
9c1455d55f
cpu: make pm_layered a DEFAULT_MODULE
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Allow to disable pm_layered in the bootloader to save some ROM.
2021-01-27 13:21:20 +01:00
Marian Buschsieweke
62aa3d103f
cpu/stm32/periph_eth: RX Timestamps
2021-01-26 10:44:04 +01:00
87cd41a6d1
Merge pull request #15657 from aabadie/pr/cpu/stm32_merge_clock_headers
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cpu/stm32: merge clock source selection headers
2021-01-25 13:57:05 +01:00
49a3592f92
Merge pull request #15849 from benpicco/cpu/stm32f7-adc
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cpu/stm32: add periph_adc for STM32F7
2021-01-25 13:12:22 +01:00
5fef40ab5a
cpu/stm32/clk: cleanup common clock configuration
2021-01-25 11:46:35 +01:00
dfed1b0567
cpu/stm32: merge g0 and g4 clock configuration headers
2021-01-25 11:46:34 +01:00
0aadf367cc
cpu/stm32: rework common clock source selection header
2021-01-25 11:46:34 +01:00
Francisco
947c63666e
Merge pull request #15834 from leandrolanzieri/pr/cpu/stm32/kconfig_features_conflict_fix
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cpu/stm32/kconfig: fix rtt/rtc error symbol
2021-01-25 10:15:32 +01:00
AravindKarri
63252d17c0
cpu/stm32/adc_f4: add support for stm32f7
2021-01-24 22:30:49 +01:00
Leandro Lanzieri
e5aca465bd
cpu/stm32/kconfig: fix rtt:rtc error symbol
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It only exists conflict between the usage of RTC and RTT on the F1
family, but the error symbol was being set for all of them. This fixes
the issue.
2021-01-23 09:59:03 +01:00
benpicco
46337efd93
Merge pull request #15783 from maribu/stm32_eth_fix_error_handling
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cpu/stm32/periph_eth: fix error handling in send()
2021-01-22 20:25:25 +01:00
b1f7fd3905
cpu/stm32: fix wrong max clock for stm32f423xx line
2021-01-21 18:31:15 +01:00
Marian Buschsieweke
21264b80cf
cpu/stm32/periph_eth: improve debugging output
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Add ENABLE_DEBUG_VERBOSE flag, so that the noise during debugging can be
reduced. This is super helpful when testing under load, as otherwise there is
just too much noise in the output.
2021-01-20 10:36:59 +01:00
Marian Buschsieweke
788f997452
cpu/stm32/periph_eth: fix error handling
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An earlier version of periph_eth used to always pack the first chunk of the
outgoing frame to the first DMA descriptor by telling the DMA to jump back
to the first descriptor within the last descriptor. This worked fine unless
the frame was send in one chunk (as e.g. lwip does), which resulted due to a
hardware bug in a frame being send out twice. For that reason, the behavior was
changed to cycle throw the linked DMA descriptor list in round-robin fashion.
However, the error checking was not updated accordingly. Hence, the error
check might run over (parts of) unrelated frames and fail to detect errors
correctly.
This commit fixes the issue and also provides proper return codes for errors.
Additionally, an DMA reset is performed on detected errors during RX/TX. I'm
not sure if/when this is needed, as error conditions are neigh impossible to
produce. But better be safe than sorry.
2021-01-20 10:35:05 +01:00
e1941d8976
cpu/stm32f2f4f7: expose clock settings in Kconfig
2021-01-19 22:09:16 +01:00
Francisco Molina
7c12ea7416
cpu/stm32/rtc: add unlock/lock to rtc_clear_alarm
2021-01-19 13:33:17 +01:00
Sebastiaan de Schaetzen
6e90111eb9
stm32/periph/uart: set flow control bits before enabling uart
2021-01-12 07:37:19 +01:00
b13598cdc4
cpu/stm32: fix ENABLE_DEBUG definition
2021-01-08 14:37:33 +01:00
d027454ad4
cpu/stm32/kconfig: use depends on instead of if
2021-01-07 16:07:04 +01:00
e8a5493080
cpu/stm32: model MCO in Kconfig for l4/wb
2021-01-07 16:02:30 +01:00
0e39c2ba17
cpu/stm32: model MCO in Kconfig for l0/l1
2021-01-07 16:02:29 +01:00
a9b154b4ac
cpu/stm32: model MCO in Kconfig for g0/g4
2021-01-07 16:02:29 +01:00
1f0e6c1057
cpu/stm32: model MCO in Kconfig for f0/f1/f3
2021-01-07 16:02:29 +01:00
5e719816d2
cpu/stm32/kconfigs: select cpu fam/lines without mco prescaler
2021-01-07 16:02:29 +01:00
048e8446ef
cpu/stm32f0: remove old clock configuration header
2020-12-17 08:38:40 +01:00
45c2b19f25
cpu/stm32: merge f0f1f3 clock configuration headers
2020-12-17 08:38:40 +01:00
8f6005b26e
boards: cpu: stm32f1: use .config for specific iotlab PLL_PREDIV
2020-12-08 18:02:57 +01:00
c68f63b318
cpu/stm32f1f3: handle custom pll prediv/mul at cpu level
2020-12-08 17:36:52 +01:00
0f23c875a2
cpu/stm32: adapt Kconfig clock configuration for f1/f3
2020-12-08 17:36:51 +01:00
benpicco
a80631a297
Merge pull request #15074 from maribu/ptp-clock
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drivers/periph/ptp_clock
2020-12-03 09:59:07 +01:00
Marian Buschsieweke
ea3752db77
cpu/stm32: Added PTP clock implementation
2020-12-02 17:53:00 +01:00
b0b19203a7
Merge pull request #15190 from benpicco/boards/wefun-f401cc
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boards/common/weact-f4x1cx: create common WeAct boards
2020-12-01 12:03:38 +01:00
Benjamin Valentin
0ed34cdb4d
cpu/stm32: periph_eth: drop addr from eth_conf_t
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MAC address is now supplied by EUI provider, no need to hard-code
it for the board.
2020-11-29 23:11:14 +01:00
Benjamin Valentin
a28a60f16c
cpu/stm32: periph_eth: register with netdev
2020-11-29 23:10:37 +01:00
3f0ea86963
cpu/stm32/include/periph_cpu.h: add missing limits.h include
2020-11-23 16:56:34 +01:00
81c270dc1b
stm32/flashpage: Remove page address casts from erase
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This removes the redefinitions of the page address in the erase
function.
2020-11-18 12:30:40 +01:00
aebf6f06d8
stm32/flashpage: Add common stm32_flashpage_block_t type
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This commits adds a common type for the block writes to the flash of the
stm32. Depending on the family, the type has a different size. This
allows the removal of a number of ifdefs to track the differences
between families, simplifying the flashpage code
2020-11-18 12:04:57 +01:00
Leandro Lanzieri
5a04f94b63
Merge pull request #14967 from aabadie/pr/boards/stm32f0_clock_kconfig_only
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boards/stm32f0: add Kconfig for clock configuration
2020-11-17 12:14:10 +01:00
Gilles DOFFE
e4fa203db4
cpu/stm32: STM32MP1 family has no flash
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Then CPU_FLASH_BASE cannot be defined as FLASH_BASE does not exist.
Signed-off-by: Gilles DOFFE <gilles.doffe@savoirfairelinux.com>
2020-11-13 10:43:08 +01:00
