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Commit Graph

32297 Commits

Author SHA1 Message Date
Benjamin Valentin
57ad2fd47c pkg/libhydrogen: bump version 2020-10-20 16:42:33 +02:00
chrysn
7ed50c3d18 gnrc_rpl: Lock against race against initializer thread
When gnrc_rpl_init was called from a thread with higher priority than
the RPL thread, the initializer's call to gnrc_netreg_register would be
executed before the event loop even had a chance to set up its message
queue.

The added short-lived lock makes it work from threads of any priority.
2020-10-20 16:14:04 +02:00
d0dd196c30
boards/stm32gx: use correct clock base for CLOCK_APBx defines 2020-10-20 15:47:21 +02:00
2f053c90bd
cpu/stm32gx: improve clock initialization sequence 2020-10-20 15:47:21 +02:00
e2ae50258a
cpu/stm32gx: factorize HSE clock activation 2020-10-20 14:29:22 +02:00
a50eab59c4
boards/stm32g0/g4: cleanup Kconfig clock configuration 2020-10-20 14:29:22 +02:00
2d603269dd
cpu/stm32gx: disable hsi only if unused 2020-10-20 14:29:11 +02:00
20894e47a6
cpu: boards: stm32gx: use IS_ACTIVE macro for clock config 2020-10-20 14:29:11 +02:00
a96ca57f66
cpu/stm32gx: remove useless LSE clock initialization 2020-10-20 14:29:11 +02:00
d78a316139
cpu: boards: stm32gx: compile code for all possible clock modes 2020-10-20 14:29:11 +02:00
Jose Alamos
d0192f3d18 tests/ieee802154_hal: set default CCA threshold 2020-10-20 14:24:01 +02:00
Jose Alamos
bc6d5ebe67 tests/ieee802154_hal: don't set state on config_phy 2020-10-20 14:24:01 +02:00
Jose Alamos
8af9147f02 tests/ieee802154_hal: go to RX_ON on frame receive 2020-10-20 14:24:01 +02:00
Jose Alamos
15ba1c765b nrf802154: improve debug messages 2020-10-20 14:24:01 +02:00
Jose Alamos
967a288e74 nrf802154: fix "off" function 2020-10-20 14:24:01 +02:00
Jose Alamos
c269456245 nrf802154: fix wrong state transitions 2020-10-20 14:24:01 +02:00
János Brodbeck
5a75eb29c3
net/netif/gnrc_netif: allow larger IPv6 MTU than minimum for BLE 2020-10-20 14:20:51 +02:00
benpicco
d4f576f677
Merge pull request #15036 from aabadie/pr/cpu/stm32l4_improve_clock_configuration
cpu/stm32l4: improve clock initialization
2020-10-20 13:24:05 +02:00
e20dc64ff3
Merge pull request #15135 from bergzand/pr/riotboot/flashwrite_raw
riotboot/flashwrite: add flashpage_raw capabilities
2020-10-20 13:05:56 +02:00
d1724d6718
cpu/stm32l4: correctly handle clock freq > 80MHz 2020-10-20 11:37:46 +02:00
00ea7ffa55
cpu/stm32l4wb: cleanup clock initialization 2020-10-20 11:37:46 +02:00
23000ce452
boards/p-nucleo-wb55: remove useless custom define 2020-10-20 11:37:45 +02:00
d7d5d9d651
boards/stm32l4: extend clock configuration
- add PLLQ default value
- better tune default PLLM value depending on HSE value
- ensure CLOCK_PLL_SRC is always defined
2020-10-20 11:37:45 +02:00
b11d65ab70
cpu/stm32l4: enable PLLQ as 48MHz source if possible 2020-10-20 11:37:45 +02:00
d31a39d7fc
Refactor verification check to remove goto and label 2020-10-20 11:22:56 +02:00
d87a5af7c6
suit/storage/flashwrite: Add flashpage_raw capability
Updates the suit flashwrite storage module to include compatibility with
the riotboot flashwrite raw capability.
2020-10-20 11:22:56 +02:00
55b0f0b6a8
riotboot/flashwrite: add flashpage_raw compatibility
This adds optional usage of periph_flashpage_raw for the
riotboot/flashwrite module. This removes the need to buffer a full
flashpage page, instead it must buffer two times the
FLASHPAGE_RAW_BLOCKSIZE. One is used to buffer the current write block,
the other buffers the first chunk (offset zero, page zero). This first
chunk is written when finalizing the flash operation.

Care must be taken that, when using the skiplength, the number of bytes
skipped is always a multiple of the FLASHPAGE_RAW_BLOCKSIZE.
2020-10-20 11:22:56 +02:00
5db04f0300
Merge pull request #15250 from benpicco/gitignore-elf
.gitignore: ignore .elf
2020-10-20 10:50:10 +02:00
Benjamin Valentin
4e9a40714d .gitignore: ignore .elf files
Prevent firmware files from accidentally being commited.
2020-10-20 10:13:24 +02:00
benpicco
d98f93513f
Merge pull request #15043 from aabadie/pr/boards/stm32f2f4f7_remove_96_180
boards/stm32f4: remove default clock configuration for 96MHz and 168MHz CPUs
2020-10-19 19:42:52 +02:00
67730fa145
Merge pull request #15247 from aabadie/pr/tests/pkg_lvgl_remove_file
tests/pkg_lvgl: remove binary file added by mistake
2020-10-19 18:21:45 +02:00
749013a3fa
tests/pkg_lvgl: remove binary file added by mistake 2020-10-19 17:52:22 +02:00
benpicco
5d67d0e236
Merge pull request #15231 from jia200x/pr/refactor_hal_auto_init
netdev_ieee802154_submac: unify legacy and radio HAL bootstrap
2020-10-19 16:47:07 +02:00
Jose Alamos
ca7240e529 ieee802154_submac: drop luid dependency 2020-10-19 15:18:35 +02:00
Jose Alamos
fa0dd8b5e2 netdev_ieee802154_submac: set addresses using netdev_register 2020-10-19 15:18:35 +02:00
Jose Alamos
217dc9e6e0 ieee802154/submac: receive IEEE 802.15.4 addresses on init 2020-10-19 15:18:35 +02:00
Jose Alamos
246acb311f lwip: adapt bootstrap for nrf802154 2020-10-19 15:18:35 +02:00
Jose Alamos
46600adf22 nrf802154: unify auto_init for HAL and netdev 2020-10-19 15:18:35 +02:00
Jose Alamos
c1a9d352f3 cc2538_rf: unify auto_init for HAL and netdev 2020-10-19 15:18:34 +02:00
Marian Buschsieweke
8fcafb89d0
Merge pull request #15242 from maribu/tinycrypt
pkg/tinycrypt: Fix dependencies
2020-10-19 10:11:10 +02:00
benpicco
fdc201a299
Merge pull request #15239 from benpicco/sys/luid-tweak
sys/luid: improve luid_base() algorithm
2020-10-19 09:55:33 +02:00
Marian Buschsieweke
8319f4ac63
tests/pkg_tinycrypt: Drop whitelist
This was an ugly hack to work around broken dependency modeling. Since the
dependencies are now correctly modelled, this hack can be dropped.
2020-10-19 09:29:37 +02:00
Marian Buschsieweke
ffc4277b9f
pkg/tinycrypt: Fix dependencies
According to tests/pkg_tinycrypt, this package only works on 32 bit archs. So
add this as a required feature.
2020-10-19 09:29:37 +02:00
benpicco
90cd436c1d
Merge pull request #15241 from benpicco/pkg/tinycrypt-bump
pkg/tinycrypt: bump version
2020-10-19 09:16:33 +02:00
Benjamin Valentin
c5e309a15d pkg/tinycrypt: bump version
Bump the snapshot of TinyCrypt that we are using.
2020-10-18 23:12:15 +02:00
Benjamin Valentin
6fa15ff3f6 sys/luid: improve luid_base() algorithm
CPU IDs may contain very little entropy. Often only a single byte
may change between two CPUs.

To mitigate this use a somewhat 'proper' hash algorithm (I chose DJB2
hash simply because it's small) and 'extend' it to the required output
size.

For 50 STM32 CPU IDs from the grenoble site, this produces a much more
random LUID output.
2020-10-18 14:52:02 +02:00
Marian Buschsieweke
652aac4e57
Merge pull request #15236 from benpicco/cpu/cortexm_common_idle_flush
cpu/cortexm_common: flush pipeline before disabling interrupts in idle
2020-10-16 22:29:12 +02:00
Benjamin Valentin
c48b331051 cpu/cortexm_common: flush pipeline before disabling interrupts in idle
When enabling & disabling interrupts back-to-back pending interrupts
are not serviced on Cortex-M23/M33.

Flush the pipeline to give interrupts a chance of executing in `sched_arch_idle()`.

This fixes `no_idle_thread` on Cortex-M23.
2020-10-16 15:36:28 +02:00
f26537cbc3
Merge pull request #15235 from aabadie/pr/drivers/fix_typo_auto_init_adc
drivers/saul: fix typo in auto_init adc function name
2020-10-16 14:08:12 +02:00
fd1057ee9f
drivers/saul: fix typo in auto_init adc function name 2020-10-16 12:33:37 +02:00