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Commit Graph

5423 Commits

Author SHA1 Message Date
Leandro Lanzieri
9f41acaac6
cpu/native: Move dependencies to Makefile.dep 2020-05-20 18:24:39 +02:00
Vincent Dupont
8d9cc3f7e6
Merge pull request #14100 from OTAkeys/fix/exti_pr_clear_issue_upstream
cpu/stm32_common: fix issue while clearing EXTI->PR reg
2020-05-19 15:08:52 +02:00
b15c4ef418
Merge pull request #14069 from benpicco/cpu/nrf52-cleanup
cpu/nrf52: update & fix vendor files, derive flash settings
2020-05-19 10:55:50 +02:00
benpicco
9f707bf121
Merge pull request #14057 from bergzand/pr/nrf52/dma_spi
nrf52: Implement EasyDMA-based SPI peripheral implemenation
2020-05-18 19:42:33 +02:00
16ff94b4fe
nrf5x: remove common nrf5x spi peripheral driver 2020-05-18 19:18:28 +02:00
99a59c5dbd
nrf5x: Extend gpio with exti channel retrieval 2020-05-18 19:17:29 +02:00
720ccad7dd
nrf52: Add EasyDMA-based SPI periph driver 2020-05-18 19:16:17 +02:00
1139c0737f
nrf52: add common SPI/I2C IRQ code 2020-05-18 19:14:56 +02:00
Abdulkerim Altuntas
578bd31908 cpu/stm32_common: fix issue while clearing EXTI->PR reg
Since the "EXTI->PR" is an "rc_w1" type of register, we need to be
careful when clearing our interrupt flag in the register. When there
are multiple interrupt flags set in the register, the "|=" operation
will mistakenly clear all pending interrupts instead of just ours.
2020-05-18 18:36:27 +02:00
benpicco
cc44992abe
Merge pull request #12827 from maribu/atmega_pwm
cpu/atmega_common/periph/pwm: Minor fix & cleanup
2020-05-16 22:26:58 +02:00
Marian Buschsieweke
506288791d
cpu/atmega_common/periph/pwm: Minor fix & cleanup
- On pwm_poweron, the PWM resolution was not restored. (A custom resolution was
  only usable if, PWM channel 0 is not used. That configuration is not common,
  so this bug was likely never triggered)
- Disabled a work around to prevent flickering:
    - Previously, PWM was disconnected on level 0% and 100%
    - This increases the run time of `pwm_set()`
    - It prevents using the PWM for wave form generation via DDS, as the wave
      noticeably jumps when reaching 0% or 100%
- Slightly reduces memory requirements: 2 Bytes of RAM, 112 Bytes of ROM
    - Tested with avr-gcc 9.2.0 and LTO enabled
2020-05-16 20:43:31 +02:00
Benjamin Valentin
bdf40d5ffa cpu/nrf52: fix NRF52811 vendor file
That `system_nrf52811.h` include must be removed.
2020-05-16 19:22:14 +02:00
Benjamin Valentin
d8a5f87aee cpu/nrf52: update vendor files 2020-05-16 19:21:56 +02:00
benpicco
22b2f3664f
Merge pull request #14089 from maribu/atmega_cpu_cleanup
cpu/atmega{_common,32u4}: Cleanup
2020-05-16 19:17:29 +02:00
Benjamin Valentin
e26ed32cd6 cpu/arm7_common: simplify irq_restore()
We do not manipulate the CPSR register outside of irq_%, so we can just
restore it's previous value and don't have to fiddle with the IRQ MASK bit.

See https://www.keil.com/pack/doc/CMSIS/Core_A/html/group__CMSIS__CPSR.html
2020-05-15 13:43:04 +02:00
Benjamin Valentin
8d0e902d38 cpu/arm7_common: add inlined header only def for irq_% 2020-05-15 13:43:04 +02:00
Marian Buschsieweke
2f3961690e
cpu/atmega_common: Add feature PUF_SRAM
The feature is implemented in `cpu/atmega_common`, so we can just enable it for
all ATmega boards.
2020-05-15 11:31:23 +02:00
Marian Buschsieweke
355b01ce98
cpu/atmega_common: Moved atmega_state to cpu.c
The global state flags should never have bin in irq_arch.c but in cpu.c. This
is not fixed.
2020-05-15 11:24:29 +02:00
Marian Buschsieweke
4d1a5b9256
cpu/atmega_common: Drop legacy include
Drop `#include "irq.h"` in `cpu.h`, which was there for a legacy work around.
A bunch of missing includes of `irq.h` materialized due to this and were
fixed.
2020-05-15 11:24:28 +02:00
Marian Buschsieweke
70f24edd03
cpu/atmega32u4: Clean up
- Drop duplicated `cpu.c` and `cpu_conf.h`: Those are already provided by
  `cpu/atmega_common`.
- The higher values for default stack size of `cpu_conf.h` in
  `cpu/atmega_common` results in three tests no longer fitting the available RAM
  ==> Updated the Makefile.ci to skip linking of those tests for the Arduino
      Leonardo
2020-05-15 11:23:05 +02:00
3b0510f9bc
Merge pull request #14077 from maribu/esp32-external-board
cpu/esp*: Allow compilation with external boards
2020-05-14 21:16:54 +02:00
Francisco
1f9d299492
Merge pull request #13196 from HendrikVE/shell-readline-refactor
sys/shell: refactor readline function
2020-05-14 15:32:45 +02:00
Marian Buschsieweke
fc28ba5c08
cpu/esp8266: Allow compilation with external boards
Replace `$(RIOTBOARD)/$(BOARD)` with `$(BOARDDIR)`, which also works for
external boards.
2020-05-14 13:35:51 +02:00
Marian Buschsieweke
1dbcdd3d4b
cpu/esp32: Allow compilation with external boards
Replace `$(RIOTBOARD)/$(BOARD)` with `$(BOARDDIR)`, which also works for
external boards.
2020-05-14 13:32:19 +02:00
Kees Bakker
5ef4b1843a
Merge pull request #14032 from benpicco/cpu/sam0_common-rtc_cleanup 2020-05-13 22:54:31 +02:00
da2230df48
Merge pull request #13999 from fjmolinas/pr_cortexm_inline_irq
cpu/cortexm_common: add inlined header only def for irq_%
2020-05-12 21:15:57 +02:00
8761c47e43
nrf51: move common SPI implementation 2020-05-12 19:15:25 +02:00
Benjamin Valentin
d34551e8da cpu/nrf52: use vendor defines for flash size
We don't need to define FLASHPAGE_SIZE and FLASHPAGE_NUMOF ourself if
the BPROT peripheral is present.
Now why nrf52840 doesn't have it, I don't know, but for nrf52832 and
nrf23811 the values in BPROT_REGIONS_SIZE and BPROT_REGIONS_NUM match
the values manually provided here before.
2020-05-12 18:10:15 +02:00
Gunar Schorcht
fef3c101b7 Revert "cpu/esp_common: fix dependency of flash target on ELF file"
This reverts commit d0cc955394.
2020-05-12 18:07:48 +02:00
Francisco Molina
b5e4224a6f
cpu/cortexm_common: remove special cortexm_sleep handle for stm32l152re
__set_PRIMASK(state) had been directly inlined to avoid a hardfault that
occured when branching after waking up from sleep with DBG_STANDBY,
DBG_STOP or DBG_SLEEP set in DBG_CR.

The hardfault occured when returning from the branch to irq_restore,
since the function is now inlined the branch does not happen either.

Refer to #14015 for more details.
2020-05-12 16:37:34 +02:00
Francisco Molina
4ad3164599
cpu/cortexm_common/irq_arch: fix irq_enable return type 2020-05-12 16:37:34 +02:00
Francisco Molina
cb5cbe7431
cpu/cortexm_common: add inlined header only def for irq_%
irq_% are not inlined by the compiler which leads to it branching
to a function that actually implement a single machine instruction.

Inlining these functions makes the call more efficient as well as
saving some bytes in ROM.
2020-05-12 16:37:34 +02:00
Benjamin Valentin
20a044c956 cpu/nrf52: fix nrf52811 interrupt vector table
SPI1 and TWI0 share the same IRQ, not SPI1 and TWI1
2020-05-12 15:10:06 +02:00
Benjamin Valentin
d53bc7bf73 cpu/nrf52: add peripherals.h vendor files
Those make our lives much easier.
2020-05-12 14:52:06 +02:00
Benjamin Valentin
fb2f2c456f cpu/nrf52: add nrf52811 vendor files 2020-05-12 14:49:26 +02:00
Philipp Blum
35dcf637f2 cpu/nrf52: add support for nrf52811 2020-05-10 17:10:33 +02:00
benpicco
0bbc86a379
Merge pull request #14041 from gschorcht/cpu/esp/fix_make_flash_dependency
cpu/esp_common: fix the dependency of the flash image on the ELF file
2020-05-08 11:55:14 +02:00
Gunar Schorcht
d0cc955394 cpu/esp_common: fix dependency of flash target on ELF file
Flashing an ESP board first requires the creation of a flash image from the ELF file.  This is realized in the `preflash` target. However, the `preflash` target only depends on the variable `BUILD_BEFORE_FLASH` but on the ELF file. Therefore, the variable `BUILD_BEFORE_FLASH` must be set to the ELF file to ensure that when using multiple make processes, the compilation of the ELF file is completed before the flash image is created.
2020-05-08 11:03:39 +02:00
Marian Buschsieweke
0fe24e1c8b
Merge pull request #13903 from benpicco/cpu/lpc2387/timer_pclk_scale
cpu/lpc2387: timer: use lpc2387_pclk_scale()
2020-05-07 22:04:14 +02:00
fabian18
a3a1c160ee mtd: Change API to return 0 on success
Returning the number of bytes written/read could return a negative integer
because a uint32_t is expected for the length in read()/write() operations.
2020-05-06 20:24:27 +02:00
Francisco Molina
bd3eff3537 cpu/esp32: switch from O2 to Os
In #12955 optimization was switched to O2 because with the '-Os'
option, the ESP32 hangs sporadically in 'tests/bench*' if
interrupts where disabled too early by benchmark tests.

Since it hasn't been reproduced since and in #13196 O2 was causing
un-explained hardfaults, since the aforementioned issue could not
be reproduced we switch back to Os by removing O2, as Os will be
used by default.
2020-05-06 18:46:43 +02:00
Benjamin Valentin
5481d8c73a cpu/sam0_common: clean up formatting
Make the code nicer to read.
2020-05-06 14:11:47 +02:00
Benjamin Valentin
e93c9a82f1 cpu/sam0_common: RTC INTFLAG are clear on write
Writing a 1 bit clears the interrupt flag, writing with |= is thus
uneccecary (and actually an error as this would clear *all* flags).

This cleanup was already done for rtt.c, but rtc.c missed out.
2020-05-06 14:05:12 +02:00
Francisco
cea0d1c532
Merge pull request #13421 from benpicco/cpu/sam0_common/i2c-deinit
drivers/periph/i2c: add periph_i2c_reconfigure feature & implementation for sam0
2020-05-05 19:09:47 +02:00
5773db93f8
Merge pull request #14025 from fjmolinas/pr_nrf5x_rtt_conf
boards/common/nrf5x: add configurable RTT_FREQUENCY
2020-05-05 17:46:05 +02:00
Benjamin Valentin
8c502322f4 cpu/sam0_common: i2c: implement the periph_i2c_reconfigure feature
This adds sam0 implementations for

 - i2c_init_pins()
 - i2c_deinit_pins()
 - i2c_pin_sda()
 - i2c_pin_scl()
2020-05-05 16:12:19 +02:00
Francisco Molina
409185c5ce
boards/common/nrf5x: add configurable RTT_FREQUENCY
Adds: RTT_MAX_FREQUENCY, RTT_MIN_FREQUENCY & RTT_CLOCK_FREQUENCY
2020-05-05 14:52:55 +02:00
cab264a056
cpu/lm4f120: fix invalid doxygen group name 2020-05-05 14:08:32 +02:00
Semjon Kerner
cb228a44f2
Merge pull request #14002 from PeterKietzmann/pr_nrf5x_hwrng_biascorr
cpu/nrf5x_common: enable bias correction in hwrng
2020-05-05 13:40:15 +02:00
benpicco
3c03394e1e
Merge pull request #13820 from francois-berder/pic32-gpio-irq
cpu: mips_pic32_common: Implement GPIO IRQ
2020-05-04 18:36:48 +02:00