RIOT-OS/RIOT
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Code Releases Activity
28,810 Commits 40 Branches 189 Tags 262 MiB
8761c47e43
Commit Graph

5389 Commits

Author SHA1 Message Date
Koen Zandberg
8761c47e43
nrf51: move common SPI implementation 2020-05-12 19:15:25 +02:00
Benjamin Valentin
20a044c956 cpu/nrf52: fix nrf52811 interrupt vector table 
SPI1 and TWI0 share the same IRQ, not SPI1 and TWI1
 2020-05-12 15:10:06 +02:00
Benjamin Valentin
d53bc7bf73 cpu/nrf52: add peripherals.h vendor files 
Those make our lives much easier.
 2020-05-12 14:52:06 +02:00
Benjamin Valentin
fb2f2c456f cpu/nrf52: add nrf52811 vendor files 2020-05-12 14:49:26 +02:00
Philipp Blum
35dcf637f2 cpu/nrf52: add support for nrf52811 2020-05-10 17:10:33 +02:00
benpicco
0bbc86a379
Merge pull request #14041 from gschorcht/cpu/esp/fix_make_flash_dependency 
cpu/esp_common: fix the dependency of the flash image on the ELF file
 2020-05-08 11:55:14 +02:00
Gunar Schorcht
d0cc955394 cpu/esp_common: fix dependency of flash target on ELF file 
Flashing an ESP board first requires the creation of a flash image from the ELF file.  This is realized in the `preflash` target. However, the `preflash` target only depends on the variable `BUILD_BEFORE_FLASH` but on the ELF file. Therefore, the variable `BUILD_BEFORE_FLASH` must be set to the ELF file to ensure that when using multiple make processes, the compilation of the ELF file is completed before the flash image is created.
 2020-05-08 11:03:39 +02:00
Marian Buschsieweke
0fe24e1c8b
Merge pull request #13903 from benpicco/cpu/lpc2387/timer_pclk_scale 
cpu/lpc2387: timer: use lpc2387_pclk_scale()
 2020-05-07 22:04:14 +02:00
fabian18
a3a1c160ee mtd: Change API to return 0 on success 
Returning the number of bytes written/read could return a negative integer
because a uint32_t is expected for the length in read()/write() operations.
 2020-05-06 20:24:27 +02:00
Francisco
cea0d1c532
Merge pull request #13421 from benpicco/cpu/sam0_common/i2c-deinit 
drivers/periph/i2c: add periph_i2c_reconfigure feature & implementation for sam0
 2020-05-05 19:09:47 +02:00
Alexandre Abadie
5773db93f8
Merge pull request #14025 from fjmolinas/pr_nrf5x_rtt_conf 
boards/common/nrf5x: add configurable RTT_FREQUENCY
 2020-05-05 17:46:05 +02:00
Benjamin Valentin
8c502322f4 cpu/sam0_common: i2c: implement the periph_i2c_reconfigure feature 
This adds sam0 implementations for

 - i2c_init_pins()
 - i2c_deinit_pins()
 - i2c_pin_sda()
 - i2c_pin_scl()
 2020-05-05 16:12:19 +02:00
Francisco Molina
409185c5ce
boards/common/nrf5x: add configurable RTT_FREQUENCY 
Adds: RTT_MAX_FREQUENCY, RTT_MIN_FREQUENCY & RTT_CLOCK_FREQUENCY
 2020-05-05 14:52:55 +02:00
Alexandre Abadie
cab264a056
cpu/lm4f120: fix invalid doxygen group name 2020-05-05 14:08:32 +02:00
Semjon Kerner
cb228a44f2
Merge pull request #14002 from PeterKietzmann/pr_nrf5x_hwrng_biascorr 
cpu/nrf5x_common: enable bias correction in hwrng
 2020-05-05 13:40:15 +02:00
benpicco
3c03394e1e
Merge pull request #13820 from francois-berder/pic32-gpio-irq 
cpu: mips_pic32_common: Implement GPIO IRQ
 2020-05-04 18:36:48 +02:00
Marian Buschsieweke
ac246cfd10
cpu/msp430_common: Fix missing include 2020-05-04 10:58:36 +02:00
benpicco
fbae0a1117
Merge pull request #13901 from benpicco/cpu/sam0_common/timer_flex_freq 
cpu/sam0_common: timer: don't ignore frequency in timer_init()
 2020-05-04 02:56:01 +02:00
benpicco
fab87d903c
Merge pull request #13991 from btcven/2020_04_30-osc 
cc26x2_cc13x2: add oscillator switching functions
 2020-05-02 22:46:03 +02:00
Dylan Laduranty
57c1a49a82
Merge pull request #13957 from benpicco/cpu/samd21-pwm_flex 
cpu/samd21: PWM don't hard-code number of channels to 3
 2020-05-02 20:52:56 +02:00
Martine Lenders
ad89680c40
Merge pull request #14004 from gschorcht/cpu/esp32/fix_newlib_nano_printf_float 
cpu/esp32: fix printf for float with newlib-nano
 2020-05-02 20:43:00 +02:00
Dylan Laduranty
76870721fe
Merge pull request #13965 from benpicco/cpu/sam0_common/periph/dac 
cpu/sam0_common: implement periph/dac
 2020-05-02 20:34:40 +02:00
Jean Pierre Dudey
4bf6a4db04
cc26x2_cc13x2: separate arrays with newline 
Signed-off-by: Jean Pierre Dudey <jeandudey@hotmail.com>
 2020-05-02 13:25:41 -05:00
Jean Pierre Dudey
a66c693ad5
cc26x2_cc13x2: add oscillator switching functions 
Signed-off-by: Jean Pierre Dudey <jeandudey@hotmail.com>
 2020-05-02 13:25:41 -05:00
Jean Pierre Dudey
0aeed80eb0
cc26xx_cc13xx: add ROM Hard-API 
This is needed to switch the SCLK_HF source clock safely.

Note: these functions work on cc26x2_cc13x2 and cc26x0, but special care
needs to be taken when calling on cc26x0 some of these functions, as
ADDI_SEM needs to be taken.

Signed-off-by: Jean Pierre Dudey <jeandudey@hotmail.com>
 2020-05-02 13:25:41 -05:00
Francois Berder
8db01ab9a0 cpu: mips_pic32_common: Implement GPIO IRQ 
Signed-off-by: Francois Berder <18538310+francois-berder@users.noreply.github.com>
 2020-05-02 17:59:17 +01:00
Benjamin Valentin
bfb3d52a63 cpu/sam0_common: implement periph/dac 
The sam0 MCUs all have a DAC peripheral.
The DAC has a resulution of 10 or 12 bits and can have one or two
output channels.

The output pins are always hard-wired to PA2 for DAC0 and PA5 for DAC1
if it exists.

On the same54-xpro I would only get a max value of ~1V when using the
internal reference, so I configured it to use an external voltage reference.

The external reference pin is hard-wired to PA3, so you'll have to connect
that to 3.3V to get results.
 2020-05-02 18:31:55 +02:00
Gunar Schorcht
5fbf74b203 cpu/esp32: fix printf for float with newlib-nano 2020-05-02 16:56:29 +02:00
PeterKietzmann
dd2d6b174e cpu/nrf5x_common: enable bias correction in hwrng 2020-05-01 17:04:36 +02:00
Benjamin Valentin
c05984b341 cpu/sam0_common: timer: don't ignore frequency in timer_init() 
Now that we can query the GCLK frequency at run-time, there is no need
to implicitely hard-code the timer frequency in the config struct anymore.
 2020-05-01 16:44:06 +02:00
benpicco
99e8b04921
Merge pull request #13812 from gschorcht/cpu/esp32/fix_newlib_nano 
cpu/esp32: use module newlib_nano
 2020-05-01 14:40:02 +02:00
benpicco
4150afea00
Merge pull request #13749 from gschorcht/cpu/esp32/periph_rtt 
cpu/esp32: replace RTC implementation by RTT implementation
 2020-05-01 14:14:01 +02:00
benpicco
c95e4c3b9e
Merge pull request #13816 from btcven/2020_04_02-setup-trim-device 
cc26x2_cc13x2: trim device registers on `cpu_init`.
 2020-05-01 14:09:08 +02:00
Benjamin Valentin
89a145ab0c cpu/lpc2387: clocks: minor style fix 2020-04-30 20:43:41 +02:00
Benjamin Valentin
c262c91561 cpu/lpc2387: PM: enable SLEEP & POWERDOWN mode 
We have to re-init PLL (and Flash) after wake from those modes.
 2020-04-30 20:43:41 +02:00
Benjamin Valentin
3b257f9a5a cpu/lpc2387: export functions to init PLL & MAM 
Those functions are needed after wake from lower sleep modes.
 2020-04-30 20:43:41 +02:00
Jean Pierre Dudey
951a99dba3
cc26x2_cc13x2: add setup_trim_device function 
This function trims the necessary registers for the device to operate
normally.

Signed-off-by: Jean Pierre Dudey <jeandudey@hotmail.com>
 2020-04-29 18:32:58 -05:00
Jean Pierre Dudey
dc1d2ace42
cc26xx_cc13xx: add ADI3 and masked access 
- Added ADI instruction offsets
- Added register banks and address bases for masked access (writes).

Signed-off-by: Jean Pierre Dudey <jeandudey@hotmail.com>
 2020-04-29 18:32:58 -05:00
Jean Pierre Dudey
92589c2129
cc26x2_cc13x2: update AON_PMCTL register bank 
- Updated documentation.
- Fixed offset of JTAGUSERCODE.
- Added necessary register values to perform startup trims.

Signed-off-by: Jean Pierre Dudey <jeandudey@hotmail.com>
 2020-04-29 18:16:45 -05:00
Jean Pierre Dudey
e2489ced97
cc26xx_cc13xx: add register values 
Add some register values needed to trim registers.

Signed-off-by: Jean Pierre Dudey <jeandudey@hotmail.com>
 2020-04-29 18:16:45 -05:00
Jean Pierre Dudey
e514266186
cc26x2_cc13x2: add FCFG->DAC_BIAS_CNF values 
These are necessary to trim some registers at startup.

Signed-off-by: Jean Pierre Dudey <jeandudey@hotmail.com>
 2020-04-29 18:16:45 -05:00
Jean Pierre Dudey
6829dfdf1b
cc26xx_cc13xx: fix FLASH->CFG offset, update VIMS 
- Changed "meh" to "Reserved".
- Renamed CTL to CFG to match SDK/TRM name.
- Added constants for VIMS and FLASH necessary to trim registers.

Signed-off-by: Jean Pierre Dudey <jeandudey@hotmail.com>
 2020-04-29 18:16:45 -05:00
Jean Pierre Dudey
1733e62217
cc26xx_cc13xx: update AON_IOC register bank 
- Updated documentation
- Fixed register bank name
- Added missing field

Signed-off-by: Jean Pierre Dudey <jeandudey@hotmail.com>
 2020-04-29 18:16:45 -05:00
Jean Pierre Dudey
cdf2e88804
cc26x2_cc13x2: add 16-bit masked access to DDI_0_OSC 
Signed-off-by: Jean Pierre Dudey <jeandudey@hotmail.com>
 2020-04-29 18:16:45 -05:00
Jean Pierre Dudey
1586c89f1a
cc26x2_cc13x2: update DDI_0_OSC register bank 
- Fixes padding.
- Updates documentation.
- Removes documentation longer than 80-chars for the registers values.

Signed-off-by: Jean Pierre Dudey <jeandudey@hotmail.com>
 2020-04-29 10:17:20 -05:00
Jean Pierre Dudey
2921944c66
cc26x2_cc13x2: add function to change AUX opmode 
This function is needed to setup the AUX operational mode at startup,
also used for managing low-power states.

Signed-off-by: Jean Pierre Dudey <jeandudey@hotmail.com>
 2020-04-29 09:38:36 -05:00
Alexandre Abadie
5a9f01d91a
native: pass eeprom file path via command line 2020-04-29 08:56:33 +02:00
Alexandre Abadie
cbdda3c990
cpu/native: read/persist EEPROM data at startup/reboot/exit 2020-04-29 08:55:10 +02:00
Alexandre Abadie
4e1d7abddc
cpu/native: implement eeprom peripheral driver 
The driver simply manages an internal buffer in memory that can be filled/dumped from/to a file
 2020-04-29 08:55:08 +02:00
benpicco
4bb8fab1dc
Merge pull request #13971 from bergzand/pr/sam0_common/cpuid_clarify 
sam0_common: clarify memcpy in cpuid_get
 2020-04-28 18:31:27 +02:00