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Commit Graph

11 Commits

Author SHA1 Message Date
Benjamin Valentin
0d977b3b3c cpu/sam0_common/periph/uart: implement buffered write
Implement interrupt based uart_write() using a tsrb for the TX buffer.

To enable it, add

    USEMODULE += periph_uart_nonblocking

to your Makefile.
2019-11-27 19:01:00 +01:00
Benjamin Valentin
9df377d699 cpu/sam*: pm: make use of DEBUG_PUTS()
`pm_set()` gets called by the idle thread whose stack is too small
for normal DEBUG()/printf().

Use DEBUG_PUTS() instead to print the static debug strings.
2019-11-22 01:30:03 +01:00
Francisco Molina
347a0fc804 cpu/ boards/: remove exports for CPU_FAM 2019-10-18 08:55:33 +02:00
Francisco Molina
5e9b92a326 cpu: remove CPU_ARCH exports 2019-10-18 08:55:33 +02:00
Benjamin Valentin
618449c7bd cpu/samd5x: hook up backup RAM 2019-10-01 18:39:40 +02:00
Benjamin Valentin
736e5e5a35 cpu/samd5x: allow more flexible selection of CLOCK_CORECLOCK
There are some constraints to the oscillators on the samd5x.

 - DFLL is fixed to run at 48 MHz
 - DPLL can run at 96 to 200 MHz

Always use DFLL for frequencies <= 48 MHz.
For frequencies >= 96 MHz, use DPLL directly.
For frequencies < 96 MHz, clock DPLL at twice the desired frequency
and use a divider.
2019-09-27 10:49:43 +02:00
Marian Buschsieweke
df27dbef7a
cpu: Moved stdio_init() into cpu_init()
- Removed stdio_init() from newlib's _init(), as this is too late in the boot
  process to allow DEBUG()ing during periph_init()
- Added stdio_init() to the various cpu_init() routines of the ARM CPUs just
  before periph_init()
2019-09-06 16:54:23 +02:00
Benjamin Valentin
a9b0db3ba4 cpu/sam0_common: add hwrng driver 2019-08-03 14:50:58 +02:00
Benjamin Valentin
99344e8030 cpu/samd5x: make sure RIOTBOOT_LEN is 2*FLASHPAGE_SIZE
The flashpage size on samd5x is 8k, so set RIOTBOOT_LEN accordingly.
2019-06-21 09:47:04 +02:00
Benjamin Valentin
f29ca155d8 cpu/samd5x: fix CPU init
There were still some things wrong with samd5x CPU init which only
showed up when used in conjunction with RIOTBOOT, that is cpu_init()
was called twice.

 - gclk_connect() should block until the GCLK is ready.
 - DPLL should be disabled dring configuration.
 - make sure not to use DPLL for MCLK when re-configuring DPLL
 - All APBxMASK bits should be in a defined state.
 - always enable 1kHz oscilator output.
2019-06-20 11:29:05 +02:00
Benjamin Valentin
f375b00ff3 cpu/samd5x: add support for samd5x/same5x MCUs
This adds supoprt for the Atmel SAMD51 & SAME54 SoC.
The SAME5x/SAMD5x is a line of Cortex-M4F MCUs that share peripherals
with the samd2x Cortex-M0+ and saml1x Cortex-M23 parts.
2019-06-06 16:47:11 +02:00