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cpu/ boards/: remove exports for CPU_FAM

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This commit is contained in:
Francisco Molina 2019-10-08 15:26:11 +02:00
parent 9f5a090782
commit 347a0fc804
19 changed files with 21 additions and 21 deletions
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2
boards/saml10-xpro/Makefile.include
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@ -1,4 +1,4 @@
export CPU_FAM = saml10
CPU_FAM = saml10
CFLAGS += -D__SAML10E16A__
include $(RIOTBOARD)/common/saml1x/Makefile.include

2
boards/saml11-xpro/Makefile.include
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@ -1,4 +1,4 @@
export CPU_FAM = saml11
CPU_FAM = saml11
CFLAGS += -D__SAML11E16A__
include $(RIOTBOARD)/common/saml1x/Makefile.include

2
cpu/efm32/Makefile.include
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@ -1,7 +1,7 @@
include $(RIOTCPU)/efm32/efm32-info.mk
CPU_ARCH = $(EFM32_ARCHITECTURE)
export CPU_FAM = $(EFM32_FAMILY)
CPU_FAM = $(EFM32_FAMILY)
# the size of riotboot on the EFM32 exceeds the default value
RIOTBOOT_LEN ?= 0x2000

6
cpu/kinetis/kinetis-info.mk
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@ -32,16 +32,16 @@ export KINETIS_SPEED := $(word 11, $(KINETIS_INFO))
ifeq ($(KINETIS_CORE), Z)
# Cortex-M0+
CPU_ARCH = cortex-m0plus
export CPU_FAMILY = klx
CPU_FAMILY = klx
else ifeq ($(KINETIS_CORE), D)
# Cortex-M4
CPU_ARCH = cortex-m4
export CPU_FAMILY = kx
CPU_FAMILY = kx
else ifeq ($(KINETIS_CORE), F)
# Cortex-M4F or Cortex-M7
# TODO: Add floating point support
CPU_ARCH = cortex-m4
export CPU_FAMILY = kx
CPU_FAMILY = kx
endif
# RAM sizes are a bit arbitrary, but are usually dependent on ROM size and core speed.

2
cpu/nrf51/Makefile.include
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@ -1,5 +1,5 @@
CPU_ARCH = cortex-m0
export CPU_FAM = nrf51
CPU_FAM = nrf51
include $(RIOTCPU)/nrf5x_common/Makefile.include
include $(RIOTMAKE)/arch/cortexm.inc.mk

2
cpu/nrf52/Makefile.include
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@ -1,5 +1,5 @@
CPU_ARCH = cortex-m4f
export CPU_FAM = nrf52
CPU_FAM = nrf52
# Slot size is determined by "((total_flash_size - RIOTBOOT_LEN) / 2)".
# If RIOTBOOT_LEN uses an uneven number of flashpages, the remainder of the

2
cpu/sam3/Makefile.include
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@ -1,5 +1,5 @@
CPU_ARCH = cortex-m3
export CPU_FAM = sam3
CPU_FAM = sam3
include $(RIOTCPU)/sam_common/Makefile.include
include $(RIOTMAKE)/arch/cortexm.inc.mk

2
cpu/samd21/Makefile.include
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@ -1,5 +1,5 @@
CPU_ARCH = cortex-m0plus
export CPU_FAM = samd21
CPU_FAM = samd21
USEMODULE += pm_layered

2
cpu/samd5x/Makefile.include
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@ -1,5 +1,5 @@
CPU_ARCH = cortex-m4f
export CPU_FAM = samd5x
CPU_FAM = samd5x
# Slot size is determined by "((total_flash_size - RIOTBOOT_LEN) / 2)".
# If RIOTBOOT_LEN uses an uneven number of flashpages, the remainder of the

2
cpu/saml21/Makefile.include
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@ -1,5 +1,5 @@
CPU_ARCH = cortex-m0plus
export CPU_FAM = saml21
CPU_FAM = saml21
USEMODULE += pm_layered

2
cpu/stm32f0/Makefile.include
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@ -1,5 +1,5 @@
CPU_ARCH = cortex-m0
export CPU_FAM = stm32f0
CPU_FAM = stm32f0
include $(RIOTCPU)/stm32_common/Makefile.include
include $(RIOTMAKE)/arch/cortexm.inc.mk

2
cpu/stm32f1/Makefile.include
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@ -1,5 +1,5 @@
CPU_ARCH = cortex-m3
export CPU_FAM = stm32f1
CPU_FAM = stm32f1
include $(RIOTCPU)/stm32_common/Makefile.include
include $(RIOTMAKE)/arch/cortexm.inc.mk

2
cpu/stm32f2/Makefile.include
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@ -1,5 +1,5 @@
CPU_ARCH = cortex-m3
export CPU_FAM = stm32f2
CPU_FAM = stm32f2
# STM32F2 uses sectors instead of pages, where the minimum sector length is 16KB
# (the first sector), therefore RIOTBOOT_LEN must be 16KB to cover a whole sector.

2
cpu/stm32f3/Makefile.include
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@ -1,5 +1,5 @@
CPU_ARCH = cortex-m4f
export CPU_FAM = stm32f3
CPU_FAM = stm32f3
include $(RIOTCPU)/stm32_common/Makefile.include
include $(RIOTMAKE)/arch/cortexm.inc.mk

2
cpu/stm32f4/Makefile.include
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@ -1,5 +1,5 @@
CPU_ARCH = cortex-m4f
export CPU_FAM = stm32f4
CPU_FAM = stm32f4
# STM32F4 uses sectors instead of pages, where the minimum sector length is 16KB
# (the first sector), therefore RIOTBOOT_LEN must be 16KB to cover a whole sector.

2
cpu/stm32f7/Makefile.include
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@ -1,5 +1,5 @@
CPU_ARCH = cortex-m7
export CPU_FAM = stm32f7
CPU_FAM = stm32f7
# STM32F7 uses sectors instead of pages, where the minimum sector length is 16KB or
# 32kB (the first sector), depending on the CPU_MODEL. Therefore RIOTBOOT_LEN must

2
cpu/stm32l0/Makefile.include
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@ -1,5 +1,5 @@
CPU_ARCH = cortex-m0plus
export CPU_FAM = stm32l0
CPU_FAM = stm32l0
include $(RIOTCPU)/stm32_common/Makefile.include
include $(RIOTMAKE)/arch/cortexm.inc.mk

2
cpu/stm32l1/Makefile.include
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@ -1,5 +1,5 @@
CPU_ARCH = cortex-m3
export CPU_FAM = stm32l1
CPU_FAM = stm32l1
include $(RIOTCPU)/stm32_common/Makefile.include
include $(RIOTMAKE)/arch/cortexm.inc.mk

2
cpu/stm32l4/Makefile.include
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@ -1,5 +1,5 @@
CPU_ARCH = cortex-m4f
export CPU_FAM = stm32l4
CPU_FAM = stm32l4
# "The Vector table must be naturally aligned to a power of two whose alignment
# value is greater than or equal to number of Exceptions supported x 4"