The CI now uses `riscv-none-elf` over the previous (and technically
incorrect) `riscv-none-embed`. In addition, we no longer probe for
host toolchains with the incorrect target triple, as the source
providing it has long declared the toolchain with the incorrect
triple as obsolete.
This fixes issues with `make compile-commands`, as this by default
generates clangd/LLVM compatible flags. Without `TARGET_ARCH_LLVM`
exported, this will fall back to `TARGET_ARCH`, which is different
for LLVM and GCC.
- Use a sane (a.k.a. simply expanded) variable for the `$(TARGET_ARCH)`
instead of an insane (a.k.a. recursive expended) variable
- The toolchain detection will now happen only once, rather than
each and every time `$(TARGET_ARCH)` is referenced
- Use a single call to `which` rather than one per possible target
triple
Fixes https://github.com/RIOT-OS/RIOT/issues/19788
With RISC-V being a relatively young toolchain, a lot of inconsistencies
between different toolchains are to be found that differ in the target
triple and the flags supported. This build system performs run-time
tests to detect the toolchain and supported flags.
With `BUILD_IN_DOCKER=1` issues arise, as this checks are performed
outside of the docker container. However, the host may have no RISC-V
toolchain installed or a different toolchain, so there is little reason
in performing this detection then. Instead, a hard coded target triple
and supported flags are provided when using `BUILD_IN_DOCKER=1`.
Use -misa-spec=2.2 on newer toolchains, which allows passing the same
-march value to both the linker and the compiler even when binutils and
GCC support difference ISA specs.
A backward incompatible change in the RISC-V resulting in instructions
previously included by rv32imac to only be available with
rv32imac_zicsr. All RISC-V CPUs supported by RIOT are hence either
considered as rv32imac (from the old ISA spec point of view) or as
rv32imac_zicsr (from the new ISA spec point of view). This adds a
simple test if GCC understands rv32imac_zicsr and uses it then as march,
but uses rv32imac as march if not.
For RISC-V and Cortex-M-not-3, triples are known and have worked in some
configuration, but do not work at the moment and stay disabled until the
reference platforms (native, M3) have been established well.
This requires -nostartfiles to be only passed to the linker, not the
compiler, as it is a linker flag and passing it to the compiler causes a
clang warning to be emitted.
Additionally, clang does not seem to support `-mcmodel=medlow` and
`-msmall-data-limit=8` but these options do not seem strictly necessary
to me anyhow thus they are deactivated conditionally when using clang.
Use riscv-none-elf instead of legacy riscv-none-embed as target triplet for
RISC-V development. However, if ricsv-none-elf is not present, try
riscv64-unknown-elf and riscv-none-embed instead. If the legacy riscv-none-embed
is used, a warning is printed.
Add `TARGET_ARCH_<ARCH>` for each architecture (e.g. `TARGET_ARCH_CORTEX` for
Cortex M) to allow users to overwrite the target triple for a specific arch
from ~/.profile or ~/.bashrc (or the like) without overwriting it for all others
as well.
