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ee3fc27e96
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cpu/fe310: implement driver for watchdog
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2020-04-07 14:37:55 +02:00 |
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Sören Tempel
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bd2f5fe110
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fe310: fix power management configuration
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2020-01-30 10:43:01 +01:00 |
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Francisco
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f76f7c73ce
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Merge pull request #12957 from aabadie/pr/cpu/fe310_spi
cpu/fe310: add spi peripheral driver
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2020-01-14 10:54:47 +01:00 |
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Tristan Bruns
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532cdc64ff
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cpu/fe310: implement SPI
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2020-01-11 13:06:39 +01:00 |
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298d573280
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cpu/fe310: provide i2c driver
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2020-01-11 13:06:10 +01:00 |
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97e1c7ba7e
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cpu/fe310: reorganize files and includes
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2020-01-10 16:41:33 +01:00 |
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e5c64c739a
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cpu/fe310: rework uart driver implem/config
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2019-12-20 15:22:09 +01:00 |
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smlng
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740eafe93b
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cpu/fe310: add missing PERIPH_TIMER_PROVIDES_SET
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2018-09-07 22:15:13 +02:00 |
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kenrabold
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7d1d5e77d8
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cpu/fe310: add RISC-V cpu FE310
New CPU FE310 from SiFive based on RISC-V architecture
build: add makefile for RISC-V builds
Makefile for builds using RISC-V tools
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2018-05-29 15:21:45 -07:00 |
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