Rename TMP006 to TMP00x
Add TMP007 sensor support to TMP00X
Change uint8_t reg to uint16_t
Add to doxygen documentation group
Expose compile time configurations
Move defines from .c to .h
Change double to float, because double is not needed
Add TMP007 register information
- Added required logic to provide correct L2 netstats when the module
netstats_l2 is used.
- Refactored code to use gnrc_netif_hdr_set_netif() over manually setting the
pid to ease future refactoring.
The cc110x driver has been re-written from scratch to overcome the limitations
of the old driver. The main motivation of the rewrite was to achieve better
maintainability by a detailed documentation, reduce the complexity and the
overhead of the SPI communication with the device, and to allow to
simultaneously use transceivers with different configuration regarding the used
base band, the channel bandwidth, the modulation rate, and the channel map.
Features of this driver include:
- Support for the CC1100, CC1101, and the CC1100e sub-gigahertz transceivers.
- Detailed documentation of every aspect of this driver.
- An easy to use configuration API that allows setting the transceiver
configuration (modulation rate, channel bandwidth, base frequency) and the
channel map.
- Fast channel hopping by pre-calibration of the channels during device
configuration (so that no calibration is needed during hopping).
- Simplified SPI communication: Only during start-up the MCU has to wait
for the transceiver to be ready (for the power regulators and the crystal
to stabilize). The old driver did this for every SPI transfer, which
resulted in complex communication code. This driver will wait on start up
for the transceiver to power up and then use RIOT's SPI API like every other
driver. (Not only the data sheet states that this is fine, it also proved to
be reliable in practise.)
- Greatly reduced latency: The RTT on the old driver (@150 kbps data rate) was
about 16ms, the new driver (@250 kbps data rate) has as RTT of ~3ms
(depending on SPI clock and on CPU performance) (measured with ping6).
- Increased reliability: The preamble size and the sync word size have been
doubled compared to the old driver (preamble: 8 bytes instead of 4,
sync word: 4 byte instead of 2). The new values are the once recommended by
the data sheet for reliable communication.
- Basic diagnostic during driver initialization to detect common issues as
SPI communication issues and GDO pin configuration/wiring issues.
- TX power configuration with netdev_driver_t::set() API-integration
- Calls to netdev_driver_t::send() block until the transmission has completed
to ease the use of the API (implemented without busy waiting, so that the
MCU can enter lower power states or other threads can be executed).
- Removed cc110x driver
- Updated all makefiles
- Kept both board specific configurations and support for it in RIOT's
upper layers, so re-implementations don't need to start from zero
The DHT11/DHT21/DHT22 cannot be sampled more than once a second. Previously,
a global cache was added to the SAUL adaption of the dht driver to answer with
stored values for one second after the last read. This however had two
disadvantages:
- The global cache was shared for all DHTXX devices connected. As a result
incorrect values were delivered when reading out multiple sensors over SAUL
with less than 1 second delay in between
- A user of the low level API will had to implement the same caching strategy,
resulting in code duplication
By moving the hold logic to the driver, both limitations can be overcome.
Previously the DHT11/DHT21/DHT22 driver ended up in an infinite loop locking up
RIOT when a communication error occurred. This commit adds a simple timeout to
the communication in order to prevent these lock ups.
Some LoRa modules don't provide all ISR lines. Thus, there are
cases where different interrupts appear simultaneously in the ISR flags.
It's required to use an AND/OR pattern to check which interrupts were triggered.
cpu/stm32_common: cleanup periph eth
boards/nucleo-f767zi: cleanup dependencies
boards/nucleo-f767zi: fix dma configuration attribute for eth
examples/default: add nucleo-767zi in boards with netif
drivers/stm_32_eth: Add header guard for eth_config
Co-authored-By: Robin <robin@chilio.net>
stm32eth: Move to stm32_common periph
cpu/stm32_periph_eth: Rebase to current master branch
- Update DMA to use new vendor headers
- Update send to use iolist. It looks like the packet headers are now transfered as seperate iolist entries which results in the eth periph sending each header as own packet. To fix this a rather ugly workaround is used where the whole iolist content is first copied to a static buffer. This will be fixed soon in another commit
- If MAC is set to zero use luid to generate one
- Small code style fixes
cpu/stm312f7: Add periph config for on-board ethernet
boards/nucleo-f767zi: Add config for on board ethernet
tests/stm32_eth_lwip: Remove board restriction
boards/common/nucleo: Add luid module if stm32 ethernet is used
tests/stm32_eth_gnrc: Add Testcase for gnrc using the stm32 eth periph
stm32_eth: Rework netdev driver layour
tests/stm32_eth_*: Use netdev driver header file for prototypes
stm32_eth: Add auto init for stm32 eth netdev driver
boards/stm32: Enable ethernet conf for nucleo boards
stm32_eth_auto_init: Add dont be pendantic flag
stm32_eth: Remove dma specific stuff from periph_cpu.h
Looks like this was implemented in PR #9171 and 021697ae94 with the same interface.
stm32_eth: Remove eth feature from stm32f4discovery boards
stm32_eth: Migrate to stm32 DMA API
stm32_eth: Add iolist to module deps
stm32_eth: Rework send function to use iolist
stm32_eth: Fix ci build warnings
stm32_eth: Fix bug introduced with iolist usage
stm32_eth: Remove redundant static buffer
stm32_eth: Fix feature dependencies
stm32_eth: Fix wrong header guard name
stm32_eth: Implement correct l2 netstats interface
stm32_eth: Rename public functions to stm32_eth_*
stm32_eth: Fix doccheck
stm32_eth: Move register DEFINE to appropriate header file
stm32_eth: remove untested configuration for f446ze boards
stm32_eth: Move periph configuration struct to stm32_common
stm32_eth: Fix naming of eth_phy_read and eth_phy_write
stm32_eth: Remove obsolete test applications
drivers/eth-phy: add generic Ethernet PHY iface
cpu/stm32f4: implement eth driver peripheral
This implements the ethernet (MAC) peripheral of the stm32f4 as a
netdev driver.
boards/stm32f4discovery: add eth configuration
boards/stm32f4discovery: add feature stm32_eth
tests/stm32_eth_lwip: add test application
- The previous implementation wrongly assumes that sx1272 and 1276
use the same logic level for triggering a reset.
- The timeout values were to short to guarantee proper reset when
coming from POR.
When writing an array of bytes, each byte is converted on the fly to 2 hex characters and sent to the rn2xx3 module. This change ensures each string is correctly terminated, with null character, when written to the module
`tsrb` changed to that type, so there is no reason for us, to keep the
internally used buffer as a `char` (especially since the rest of the
driver already uses `uint8_t`)
