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Commit Graph

4679 Commits

Author SHA1 Message Date
MrKevinWeiss
5c085d711d cpu/native: Suppress cpu specific spi_clk_t in doxygen 2019-11-18 11:44:13 +01:00
MrKevinWeiss
d218b77ff7 cpu/esp8266: Suppress cpu specific i2c_speed_t in doxygen 2019-11-18 11:43:45 +01:00
MrKevinWeiss
02bd107722 cpu/esp8266: Suppress cpu specific gpio_flank_t in doxygen
The enumeration takes both the cpu and the driver, it should only show the driver enum
2019-11-18 11:43:12 +01:00
Kevin "Tristate Tom" Weiss
be39169bd4
Merge pull request #11108 from gschorcht/cpu/esp8266/esp-idf/pr
cpu/esp8266: complete reimplementation based on ESP8266 RTOS SDK
2019-11-18 09:34:49 +01:00
7d3a6fecee
cpu/efm32: provide arch_efm32 features 2019-11-16 14:07:53 +01:00
Yegor Yefremov
f2127391c4 doxygen/UART: don't include overridden typedefs
Add missing #ifndefs to overridden UART typedefs.

Signed-off-by: Yegor Yefremov <yegorslists@googlemail.com>
2019-11-15 10:44:52 +01:00
Yegor Yefremov
df7e760588 doxygen/I2C: don't include overridden typedefs
Add missing #ifndefs to overridden I2C typedefs.

Signed-off-by: Yegor Yefremov <yegorslists@googlemail.com>
2019-11-15 10:35:33 +01:00
Yegor Yefremov
cf65070b06 doxygen/GPIO: don't include overridden typedefs
Add missing #ifndefs to overridden GPIO typedefs.

Signed-off-by: Yegor Yefremov <yegorslists@googlemail.com>
2019-11-15 10:35:33 +01:00
Yegor Yefremov
fa3b0ff04b doxygen/SPI: don't include overridden typedefs
Add missing #ifndefs to overridden SPI typedefs.

Signed-off-by: Yegor Yefremov <yegorslists@googlemail.com>
2019-11-15 10:35:32 +01:00
Yegor Yefremov
5b0252b150 doxygen/ADC: don't include overridden typedefs
Add missing #ifndefs to overridden ADC resolution typedefs.

Signed-off-by: Yegor Yefremov <yegorslists@googlemail.com>
2019-11-15 10:35:32 +01:00
Francisco
1018a6fa67
Merge pull request #12679 from jue89/bugfix/stm32f103rc-ramlen
cpu/stm32_common: fix RAM_SIZE for stm32f103xc, stm32f105xx and stm32f107xx
2019-11-14 22:28:43 +01:00
Francisco
2adc5a23c2
Merge pull request #12361 from haukepetersen/add_nimble_autoconn
pkg/nimble: add simple BLE connection manager: autoconn
2019-11-14 14:02:24 +01:00
Gunar Schorcht
555a7040db cpu/esp8266: reset tool to allow automatic tests 2019-11-14 13:58:48 +01:00
Gunar Schorcht
309eab9ae0 cpu/esp8266: enable colored output with log_color 2019-11-14 13:58:48 +01:00
Gunar Schorcht
fe028455e5 cpu/esp8266: esptool.py is provided as tool
The modified version esptool.py from RTOS SDK that is required for flashing an image, is now placed in `dist/tools/esptool.py` and used directly from there. The advantage is that `esptool.py` hasn't to be installed explicitly anymore. Having RIOT is enough. The documentation is adapted accordingly. The oly prerequisite is that python and the pyserial module are installed.
2019-11-14 13:58:48 +01:00
Gunar Schorcht
62922769b3 cpu/esp8266: high-priority threads creation
High priority thread for the WiFi interface are only created at startup when the WiFi interface is used.
2019-11-14 13:58:48 +01:00
Gunar Schorcht
405be02da4 cpu/esp8266: funcs must not be called in assert
In vendor startup code, initialization function were called as parameters of assert statement. With DEVELHELP, they are not called since the assert macro does nothing.
2019-11-14 13:58:48 +01:00
Gunar Schorcht
2c7b9b4fb4 cpu/esp8266: toolchain renamed
To make the migration progress to the new RTOS SDK easier, the new toolchain was renamed to xtensa-esp8266-elf. This makes it possible to have the new and the old toolchain installed in parallel.
2019-11-14 13:58:48 +01:00
Gunar Schorcht
b15d7df6dc cpu/esp8266: ESP8266_SDK_DIR renamed
To make the migration progress to the new RTOS SDK easier, the ESP8266_SDK_DIR variable was renamed to ESP8266_RTOS_SDK_DIR.
2019-11-14 13:58:44 +01:00
Gunar Schorcht
9facce8c02 cpu/esp8266: use default number of priority levels
If the WiFi module is used, a number of high priority tasks is created. To void priority collisions with netdev drivers, the number of priorities SCHED_PRIO_LEVELS has to be increased to 32. But in other cases, the default number should be used, also to keep automatic tests working.
2019-11-14 13:58:25 +01:00
Gunar Schorcht
afa02044f2 cpu/esp8266: required bootloader binaries 2019-11-14 13:58:25 +01:00
Gunar Schorcht
4f4d882f68 cpu/esp32: changes for RTOS SDK 2019-11-14 13:58:25 +01:00
Gunar Schorcht
ddc91df4ca cpu/esp8266: changes for RTOS SDK 2019-11-14 13:58:22 +01:00
Gunar Schorcht
a212228147 cpu/esp8266: files that are not needed any longer removed 2019-11-14 12:04:29 +01:00
Gunar Schorcht
28ea0a0914 cpu/esp8266: required vendor RTOS SDK components added 2019-11-14 12:04:21 +01:00
Kees Bakker
43670aee7b
Merge pull request #12615 from benpicco/samd21-1kHz_gclk
cpu/samd21: use dedicated 1kHz GCLK4 for RTC and WDT
2019-11-13 20:25:55 +01:00
Jue
b037bce7ab cpu/stm32_common: fixed RAM_LEN for stm32f105__ and stm32f107__ 2019-11-13 19:58:44 +01:00
Jue
ef9363a509 cpu/stm32_common: fixed RAM_LEN for stm32f103_c 2019-11-13 19:57:59 +01:00
Gunar Schorcht
f397a74948 cpu/esp8266: FreeRTOS adaption layer added for RTOS SDK 2019-11-13 19:00:39 +01:00
Hauke Petersen
4bf14822cb nrf5x: move nimble_ble feat. to cpu 2019-11-13 13:43:55 +01:00
Hauke Petersen
d87228dab1 cpu/nrf52: add feature 'ble_nimble_netif' 2019-11-13 13:05:34 +01:00
Dylan Laduranty
0e736b8879
Merge pull request #12675 from benpicco/sam0-rtt-fix
cpu/sam0_common: rtt: enable COUNTSYNC in CTRLA
2019-11-13 10:12:07 +01:00
Bas Stottelaar
0c18ef4f23
Merge pull request #12278 from benemorius/pr/efm32-uart-rx_cb
cpu/efm32/uart: fix handling of RX when no RX callback is configured
2019-11-12 21:33:07 +01:00
Dylan Laduranty
6ec6aaf4b0
Merge pull request #12393 from benpicco/sam0-spi_reconfig
sam0/spi: Don't re-configure SPI device when not needed
2019-11-12 20:51:53 +01:00
benpicco
f77e5a6c6a
Merge pull request #12673 from benpicco/purge-rtc_numof
boards: remove RTT_NUMOF/RTC_NUMOF
2019-11-12 11:33:16 +01:00
Benjamin Valentin
d21dc25cfe sam0/spi: Don't re-configure SPI device when not needed
Currently, spi_acquire() will always re-configure the SPI bus.
If the configuration did not change, this is entirely uneccecary
and makes SPI operations take longer than needed.

Instead, compare the current configuration with the new configuration
and skip the initialisation if it didn't change since the last call.
2019-11-12 11:31:41 +01:00
Benjamin Valentin
db2fa33660 sam0_common: rtc: use GCLK4 on SAMD21
The RTC expects to be clocked from a 1kHz source.
Previously it would re-configure GCLK2 from 32kHz to 1kHz when used.

Since GCLK2 is also used by EIC, this would break external interrupts
in strange and unexpected ways.

Dedicate a 1kHz clock to it to avoid the damage.
2019-11-12 11:30:02 +01:00
Benjamin Valentin
5fa234e435 sam0_common: wdt: use GCLK4 on SAMD21
GCLK4 will always run at 1kHz on SAMD21, so use it directly.
2019-11-12 11:29:25 +01:00
Benjamin Valentin
d92c079a90 cpu/samd21: configure GCLK4 with 1024 Hz
Both WDT and RTC expect a 1 kHz clock.
Source it from the same generator as the 32 kHz GCLK2.
2019-11-12 11:29:17 +01:00
Benjamin Valentin
89b987494e cpu/sam0_common: rtt: enable COUNTSYNC in CTRLA
From the data sheet:

> The COUNT register requires synchronization when reading.
> Disabling the synchronization will prevent reading valid
> values from the COUNT register.

Without this bit enabled, rtt_get_counter() will always return 0.
2019-11-12 11:28:08 +01:00
Benjamin Valentin
3ce6ddcdb2 cpu/atmega_common: cpuid: add a word of warning
The CPU ID only differs in byte 4 (RC calibration) between devices.

Add a word of warning to the documentation that this may not be very unique.
2019-11-11 18:07:09 +01:00
Benjamin Valentin
5b6d56efd5 atmega_common: provide CPU ID for every device
ATmega128RFA1/ATmega256RFR2 do not have a unique CPU ID.

Use the RC oscillator callibration byte as an impromptu CPU ID and rely
on bootlader constants present on all ATmega families for the remaining
bytes.

This way we can provide a faux CPU ID on all ATmega MCUs and typical hobbyists
with no access to JTAG adapters or high voltage programmer capable of writing
the user signature have a good chance that the CPU IDs of their device do not collide.
2019-11-08 16:58:03 +01:00
Benjamin Valentin
0ea2cbf1eb boards: remove RTT_NUMOF/RTC_NUMOF
Those macros are defined but never used.
2019-11-08 14:20:33 +01:00
Marian Buschsieweke
72714aefea
cpu/lpc2387: Added MCU provided features
Added features provided by the LPC2387 MCU to cpu/lpc2387/Makefile.features
2019-11-08 14:02:35 +01:00
Gunar Schorcht
dca6d59b60 cpu/esp_common: vendor files changed for RTOS SDK 2019-11-08 13:22:50 +01:00
Gunar Schorcht
a6d01fc2de cpu/esp8266: vendor files changed for RTOS SDK 2019-11-08 10:32:18 +01:00
Gunar Schorcht
464bb9f4c4 cpu/esp8266: vendor files that are no longer needed removed 2019-11-08 10:32:18 +01:00
Leandro Lanzieri
66d5e4d05f
Merge pull request #12637 from benpicco/lpc2387-uart
cpu/lpc2387: update the UART driver
2019-11-07 22:21:50 +01:00
Benjamin Valentin
9e68556393 boards/msba2: configure remaining UARTs
All UARTs on the MSBA2 are exposed through pin headers on the board.
Configure them according to the data sheet.
2019-11-07 21:55:25 +01:00
Benjamin Valentin
c544c41804 cpu/lpc2387: fix indent 2019-11-07 21:55:24 +01:00