mirror of
https://github.com/RIOT-OS/RIOT.git
synced 2024-12-29 04:50:03 +01:00
cpu/esp_common: vendor files changed for RTOS SDK
This commit is contained in:
Gunar Schorcht
parent
a6d01fc2de
commit
dca6d59b60
@ -24,16 +24,12 @@
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#include "cpu_conf.h"
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#include "net/netdev.h"
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#include "net/gnrc.h"
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#include "esp_common_log.h"
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#include "esp_now_params.h"
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#include "esp_now_netdev.h"
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#include "esp_now_gnrc.h"
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#include "net/gnrc/netif.h"
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#ifdef MCU_ESP8266
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#include "log.h"
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#include "common.h"
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#endif
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#define ENABLE_DEBUG (0)
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#include "debug.h"
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@ -27,25 +27,17 @@
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#include "net/gnrc.h"
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#include "xtimer.h"
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#ifdef MCU_ESP32
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#include "esp_common.h"
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#include "esp_attr.h"
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#include "esp_event_loop.h"
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#include "esp_now.h"
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#include "esp_system.h"
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#include "esp_wifi.h"
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#include "nvs_flash/include/nvs_flash.h"
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#else
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#include "common.h"
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#include "espressif/c_types.h"
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#include "espnow.h"
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#include "esp/common_macros.h"
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#include "sdk/sdk.h"
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#endif /* MCU_ESP32 */
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#include "irq_arch.h"
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#include "od.h"
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#include "nvs_flash/include/nvs_flash.h"
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#include "esp_now_params.h"
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#include "esp_now_netdev.h"
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@ -61,50 +53,25 @@
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#define ESP_NOW_AP_PREFIX "RIOT_ESP_"
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#define ESP_NOW_AP_PREFIX_LEN (strlen(ESP_NOW_AP_PREFIX))
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#ifdef MCU_ESP32
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#define esp_now_set_self_role(r)
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#else
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#define ESP_NOW_ROLE_IDLE (0)
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#define ESP_NOW_ROLE_CONTROLLER (1)
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#define ESP_NOW_ROLE_SLAVE (2)
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#define ESP_NOW_ROLE_COMBO (3)
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#define ESP_NOW_KEY_LEN (16)
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#define ESP_OK (0)
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#ifndef IRAM_ATTR
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#define IRAM_ATTR IRAM
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#endif
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#endif /* MCU_ESP8266 */
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#if MODULE_ESP_WIFI && !ESP_NOW_UNICAST
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#error If module esp_wifi is used, module esp_now has to be used in unicast mode
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#endif
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/**
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* There is only one ESP-NOW device. We define it as static device variable
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* to have accesss to the device inside ESP-NOW interrupt routines which do
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* to have access to the device inside ESP-NOW interrupt routines which do
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* not provide an argument that could be used as pointer to the ESP-NOW
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* device which triggers the interrupt.
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*/
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static esp_now_netdev_t _esp_now_dev;
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static esp_now_netdev_t _esp_now_dev = { 0 };
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static const netdev_driver_t _esp_now_driver;
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#ifdef MCU_ESP32
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static bool _esp_now_add_peer(const uint8_t* bssid, uint8_t channel, uint8_t* key)
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#else
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static bool _esp_now_add_peer(uint8_t* bssid, uint8_t channel, uint8_t* key)
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#endif
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{
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if (esp_now_is_peer_exist(bssid)) {
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return false;
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}
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#ifdef MCU_ESP32
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esp_now_peer_info_t peer = {};
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memcpy(peer.peer_addr, bssid, ESP_NOW_ETH_ALEN);
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@ -117,11 +84,6 @@ static bool _esp_now_add_peer(uint8_t* bssid, uint8_t channel, uint8_t* key)
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}
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esp_err_t ret = esp_now_add_peer(&peer);
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#else
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int ret = esp_now_add_peer(bssid, ESP_NOW_ROLE_COMBO, channel,
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esp_now_params.key,
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esp_now_params.key ? ESP_NOW_KEY_LEN : 0);
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#endif
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DEBUG("esp_now_add_peer node %02x:%02x:%02x:%02x:%02x:%02x "
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"added with return value %d\n",
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bssid[0], bssid[1], bssid[2], bssid[3], bssid[4], bssid[5], ret);
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@ -133,8 +95,6 @@ static bool _esp_now_add_peer(uint8_t* bssid, uint8_t channel, uint8_t* key)
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static xtimer_t _esp_now_scan_peers_timer;
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static bool _esp_now_scan_peers_done = false;
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#ifdef MCU_ESP32
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#define ESP_NOW_APS_BLOCK_SIZE 8 /* has to be power of two */
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static wifi_ap_record_t* aps = NULL;
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@ -207,64 +167,14 @@ static void IRAM_ATTR esp_now_scan_peers_done(void)
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mutex_unlock(&_esp_now_dev.dev_lock);
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}
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#else /* MCU_ESP32 */
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static const struct scan_config scan_cfg = {
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.ssid = 0,
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.bssid = 0,
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.channel = ESP_NOW_CHANNEL,
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.show_hidden = true
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};
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static void IRAM esp_now_scan_peers_done(void *arg, STATUS status)
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{
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/* This function is executed in interrupt context */
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DEBUG("%s: %p %d\n", __func__, arg, status);
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CHECK_PARAM (status == OK);
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CHECK_PARAM (arg != NULL);
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critical_enter();
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struct bss_info *bss_link = (struct bss_info*)arg;
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/* iterate over APs records */
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while (bss_link) {
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/* check whether the AP is an ESP_NOW node */
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if (strncmp((char*)bss_link->ssid, ESP_NOW_AP_PREFIX, ESP_NOW_AP_PREFIX_LEN) == 0) {
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/* add the AP as peer */
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_esp_now_add_peer(bss_link->bssid, bss_link->channel, esp_now_params.key);
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}
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bss_link = STAILQ_NEXT(bss_link, next);
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}
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#if ENABLE_DEBUG
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uint8_t peers_all;
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uint8_t peers_enc;
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esp_now_get_cnt_info (&peers_all, &peers_enc);
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DEBUG("associated peers total=%d, encrypted=%d\n", peers_all, peers_enc);
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#endif /* ENABLE_DEBUG */
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_esp_now_scan_peers_done = true;
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critical_exit();
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}
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#endif /* MCU_ESP32 */
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static void esp_now_scan_peers_start(void)
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{
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DEBUG("%s\n", __func__);
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/* start the scan */
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esp_wifi_scan_start(&scan_cfg, false);
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/* set the time for next scan */
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xtimer_set(&_esp_now_scan_peers_timer, esp_now_params.scan_period);
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/* start the scan */
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#ifdef MCU_ESP32
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esp_wifi_scan_start(&scan_cfg, false);
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#else
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wifi_station_scan((struct scan_config*)&scan_cfg, esp_now_scan_peers_done);
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#endif
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}
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static void IRAM_ATTR esp_now_scan_peers_timer_cb(void* arg)
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@ -287,11 +197,7 @@ static const uint8_t _esp_now_mac[6] = { 0x82, 0x73, 0x79, 0x84, 0x79, 0x83 }; /
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static bool _in_recv_cb = false;
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#ifdef MCU_ESP32
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static IRAM_ATTR void esp_now_recv_cb(const uint8_t *mac, const uint8_t *data, int len)
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#else
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static IRAM_ATTR void esp_now_recv_cb(uint8_t *mac, uint8_t *data, uint8_t len)
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#endif
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{
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#if ESP_NOW_UNICAST
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if (!_esp_now_scan_peers_done) {
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@ -349,11 +255,7 @@ static IRAM_ATTR void esp_now_recv_cb(uint8_t *mac, uint8_t *data, uint8_t len)
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static volatile int _esp_now_sending = 0;
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#ifdef MCU_ESP32
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static void IRAM_ATTR esp_now_send_cb(const uint8_t *mac, esp_now_send_status_t status)
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#else
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static void IRAM_ATTR esp_now_send_cb(uint8_t *mac, uint8_t status)
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#endif
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{
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DEBUG("%s: sent to %02x:%02x:%02x:%02x:%02x:%02x with status %d\n",
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__func__,
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@ -364,7 +266,6 @@ static void IRAM_ATTR esp_now_send_cb(uint8_t *mac, uint8_t status)
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}
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}
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#ifdef MCU_ESP32
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/*
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* Event handler for esp system events.
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*/
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@ -389,12 +290,6 @@ static esp_err_t IRAM_ATTR _esp_system_event_handler(void *ctx, system_event_t *
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extern esp_err_t esp_system_event_add_handler(system_event_cb_t handler,
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void *arg);
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#else /* MCU_ESP32 */
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#define ESP_IF_WIFI_STA (STATION_IF)
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#endif /* MCU_ESP32 */
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esp_now_netdev_t *netdev_esp_now_setup(void)
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{
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esp_now_netdev_t* dev = &_esp_now_dev;
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@ -406,17 +301,17 @@ esp_now_netdev_t *netdev_esp_now_setup(void)
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return dev;
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}
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#ifdef MCU_ESP32
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/* initialize buffer */
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dev->rx_len = 0;
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/* set the event handler */
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esp_system_event_add_handler(_esp_system_event_handler, NULL);
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#ifdef MCU_ESP32
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/* init the WiFi driver */
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extern portMUX_TYPE g_intr_lock_mux;
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mutex_init(&g_intr_lock_mux);
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#endif /* MCU_ESP32 */
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esp_err_t result;
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@ -462,7 +357,7 @@ esp_now_netdev_t *netdev_esp_now_setup(void)
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}
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};
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/* get SoftAP interface mac address and store it as device addresss */
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/* get SoftAP interface mac address and store it as device address */
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esp_read_mac(dev->addr, ESP_MAC_WIFI_SOFTAP);
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/* prepare the ESP_NOW configuration for SoftAP */
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@ -513,6 +408,7 @@ esp_now_netdev_t *netdev_esp_now_setup(void)
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"esp_wifi_start failed with return value %d\n", result);
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return NULL;
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}
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#if !ESP_NOW_UNICAST
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/* all ESP-NOW nodes get the shared mac address on their station interface */
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esp_wifi_set_mac(ESP_IF_WIFI_STA, (uint8_t*)_esp_now_mac);
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@ -520,41 +416,6 @@ esp_now_netdev_t *netdev_esp_now_setup(void)
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#endif /* MODULE_ESP_WIFI */
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#else /* MCU_ESP32 */
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int result;
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/* set the WiFi interface to Station + SoftAP mode without DHCP */
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wifi_set_opmode_current(ESP_NOW_WIFI_STA_SOFTAP);
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wifi_softap_dhcps_stop();
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/* get SoftAP mac address and store it in device address */
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wifi_get_macaddr(SOFTAP_IF, dev->addr);
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/* set the SoftAP configuration */
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struct softap_config ap_conf;
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strcpy((char*)ap_conf.password, esp_now_params.softap_pass);
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sprintf((char*)ap_conf.ssid, "%s%02x%02x%02x%02x%02x%02x", ESP_NOW_AP_PREFIX,
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dev->addr[0], dev->addr[1], dev->addr[2],
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dev->addr[3], dev->addr[4], dev->addr[5]);
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ap_conf.ssid_len = strlen((char*)ap_conf.ssid);
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ap_conf.channel = esp_now_params.channel; /* support 1 ~ 13 */
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ap_conf.authmode = AUTH_WPA2_PSK; /* don't support AUTH_WEP in softAP mode. */
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ap_conf.ssid_hidden = 0; /* default 0 */
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ap_conf.max_connection = 4; /* default 4, max 4 */
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ap_conf.beacon_interval = 100; /* support 100 ~ 60000 ms, default 100 */
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wifi_softap_set_config_current(&ap_conf);
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#if !ESP_NOW_UNICAST
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/* all ESP-NOW nodes get the shared mac address on their station interface */
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wifi_set_macaddr(ESP_IF_WIFI_STA, (uint8_t*)_esp_now_mac);
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#endif
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#endif /* MCU_ESP32 */
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/* set the netdev driver */
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dev->netdev.driver = &_esp_now_driver;
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@ -572,7 +433,6 @@ esp_now_netdev_t *netdev_esp_now_setup(void)
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}
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esp_now_register_send_cb(esp_now_send_cb);
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esp_now_register_recv_cb(esp_now_recv_cb);
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esp_now_set_self_role(ESP_NOW_ROLE_COMBO);
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#if ESP_NOW_UNICAST
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/* timer for peer scan initialization */
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2
cpu/esp_common/vendor/xtensa/portasm.S
vendored
2
cpu/esp_common/vendor/xtensa/portasm.S
vendored
@ -57,6 +57,8 @@ port_IntStack:
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.space configISR_STACK_SIZE
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.global port_IntStackTop
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port_IntStackTop:
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.global _chip_interrupt_tmp
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_chip_interrupt_tmp:
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.word 0
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#ifndef RIOT_VERSION
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6
cpu/esp_common/vendor/xtensa/xtensa_intr.c
vendored
6
cpu/esp_common/vendor/xtensa/xtensa_intr.c
vendored
@ -112,13 +112,7 @@ xt_handler xt_set_interrupt_handler(int n, xt_handler f, void * arg)
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if( Xthal_intlevel[n] > XCHAL_EXCM_LEVEL )
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return 0; /* priority level too high to safely handle in C */
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#ifdef MODULE_ESP_SDK
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/* for compatibility reasons with SDK, we use _xtos_interrupt_table */
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/* in reverse order */
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entry = _xt_interrupt_table + (XCHAL_NUM_INTERRUPTS - n);
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#else
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entry = _xt_interrupt_table + n;
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#endif
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old = entry->handler;
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if (f) {
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@ -66,7 +66,6 @@ _xt_vpri_mask: .word 0xFFFFFFFF /* Virtual priority mask */
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in SDK we use _xtos_interrupt_table_ which is provided as symbol
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_xt_interrupt_table_ by ld script
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*/
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#ifndef MODULE_ESP_SDK
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.data
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.global _xt_interrupt_table
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.align 8
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@ -79,7 +78,6 @@ _xt_interrupt_table:
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.word i /* handler arg (default: intnum) */
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.set i, i+1
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.endr
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#endif
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#endif /* XCHAL_HAVE_INTERRUPTS */
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166
cpu/esp_common/vendor/xtensa/xtensa_vectors.S
vendored
166
cpu/esp_common/vendor/xtensa/xtensa_vectors.S
vendored
@ -96,7 +96,6 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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/* Enable stack backtrace across exception/interrupt - see below */
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#define XT_DEBUG_BACKTRACE 1
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/*
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--------------------------------------------------------------------------------
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Defines used to access _xtos_interrupt_table.
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@ -225,10 +224,6 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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find_ms_setbit a3, a4, a3, 0 /* a3 = interrupt number */
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#if MODULE_ESP_SDK /* _xtos_interrupt_table is in reverse order */
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movi a4, XCHAL_NUM_INTERRUPTS /* intnum = XCHAL_NUM_INTERRUPTS - intnum */
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sub a3, a4, a3
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#endif
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movi a4, _xt_interrupt_table
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addx8 a3, a3, a4 /* a3 = address of interrupt table entry */
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l32i a4, a3, XIE_HANDLER /* a4 = handler address */
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@ -302,6 +297,7 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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*/
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.text
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.literal_position
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.global _xt_panic
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.type _xt_panic,@function
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.align 4
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@ -315,6 +311,10 @@ _xt_panic:
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movi a2, SYS_gdb_abort
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simcall
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#else
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#ifdef RIOT_VERSION
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addi a2, a0, -3
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call0 _panic_handler
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#endif
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rsil a2, XCHAL_EXCM_LEVEL /* disable all low & med ints */
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1: j 1b /* loop infinitely */
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#endif
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@ -388,6 +388,14 @@ Debug Exception.
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.align 4
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_DebugExceptionVector:
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/*
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* Please note that this code will be overwritten with
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*
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* xsr a2, excsave2
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* jx a2
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*
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* if module esp_gdbstub is used.
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*/
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#ifdef XT_SIMULATOR
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/*
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@ -401,15 +409,15 @@ _DebugExceptionVector:
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wsr a3, EXCSAVE+XCHAL_DEBUGLEVEL
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movi a3, xthal_debugexc_defhndlr_nw /* use default debug handler */
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jx a3
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#else
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#else /* XT_SIMULATOR */
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wsr a0, EXCSAVE+XCHAL_DEBUGLEVEL /* save original a0 somewhere */
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call0 _xt_panic /* does not return */
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rfi XCHAL_DEBUGLEVEL /* make a0 point here not later */
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#endif
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#endif /* XT_SIMULATOR */
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.end literal_prefix
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.end literal_prefix
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#endif
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#endif /* XCHAL_HAVE_DEBUG */
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/*
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--------------------------------------------------------------------------------
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@ -503,6 +511,7 @@ _UserExceptionVector:
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* "LoadStoreError Handler END" markers was extracted from esp-open-rtos. It is
|
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* under the following copyright:
|
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*
|
||||
* Part of esp-open-rtos
|
||||
* Original vector contents Copyright (C) 2014-2015 Espressif Systems
|
||||
* Additions Copyright (C) Superhouse Automation Pty Ltd and Angus Gratton
|
||||
* BSD Licensed as described in the file LICENSE
|
||||
@ -573,13 +582,13 @@ _LoadStoreErrorHandler:
|
||||
s32i a2, sp, 0x08
|
||||
s32i a3, sp, 0x0c
|
||||
s32i a4, sp, 0x10
|
||||
rsr a0, sar # Save SAR in a0 to restore later
|
||||
rsr a0, sar # Save SAR in a0 to restore later
|
||||
|
||||
/* Examine the opcode which generated the exception */
|
||||
/* Note: Instructions are in this order to avoid pipeline stalls. */
|
||||
rsr a2, epc1
|
||||
movi a3, ~3
|
||||
ssa8l a2 # sar is now correct shift for aligned read
|
||||
ssa8l a2 # sar is now correct shift for aligned read
|
||||
and a2, a2, a3 # a2 now 4-byte aligned address of instruction
|
||||
l32i a4, a2, 0
|
||||
l32i a2, a2, 4
|
||||
@ -600,8 +609,8 @@ _LoadStoreErrorHandler:
|
||||
and a4, a3, a4 # a4 now word aligned read address
|
||||
|
||||
l32i a4, a4, 0 # perform the actual read
|
||||
ssa8l a3 # sar is now shift to extract a3's byte
|
||||
srl a3, a4 # shift right correct distance
|
||||
ssa8l a3 # sar is now shift to extract a3's byte
|
||||
srl a3, a4 # shift right correct distance
|
||||
extui a4, a3, 0, 8 # mask off bits we need for an l8
|
||||
|
||||
.LSE_post_fetch:
|
||||
@ -678,8 +687,8 @@ _LoadStoreErrorHandler:
|
||||
and a4, a3, a4 # a4 now word aligned read address
|
||||
|
||||
l32i a4, a4, 0 # perform the actual read
|
||||
ssa8l a3 # sar is now shift to extract a3's bytes
|
||||
srl a3, a4 # shift right correct distance
|
||||
ssa8l a3 # sar is now shift to extract a3's bytes
|
||||
srl a3, a4 # shift right correct distance
|
||||
extui a4, a3, 0, 16 # mask off bits we need for an l16
|
||||
|
||||
bbci a2, 15, .LSE_post_fetch # Not a signed op
|
||||
@ -1951,14 +1960,32 @@ _xt_highint6:
|
||||
|
||||
#if XCHAL_HAVE_NMI
|
||||
|
||||
#define NMI_STACK_CANARY 0xABBABABA
|
||||
|
||||
/* Stack space for NMI handler
|
||||
|
||||
NMI handler stack high water mark measured at 0x134 bytes. Any use
|
||||
of the NMI timer callback will add stack overhead as well.
|
||||
|
||||
The NMI handler does a basic check for stack overflow
|
||||
*/
|
||||
|
||||
.section .bss
|
||||
.balign 16
|
||||
|
||||
NMIHandlerStack:
|
||||
.skip 0x200
|
||||
.NMIHandlerStackTop:
|
||||
|
||||
.begin literal_prefix .NMIExceptionVector
|
||||
.section .NMIExceptionVector.text, "ax"
|
||||
.global _NMIExceptionVector
|
||||
.type _NMIExceptionVector,@function
|
||||
.literal_position
|
||||
|
||||
.align 4
|
||||
|
||||
_NMIExceptionVector:
|
||||
|
||||
wsr a0, EXCSAVE + XCHAL_NMILEVEL _ /* preserve a0 */
|
||||
call0 _xt_nmi /* load interrupt handler */
|
||||
/* never returns here - call0 is used as a jump (see note at top) */
|
||||
@ -1983,6 +2010,113 @@ _xt_nmi:
|
||||
/* USER_EDIT:
|
||||
ADD HIGH PRIORITY NON-MASKABLE INTERRUPT (NMI) HANDLER CODE HERE.
|
||||
*/
|
||||
#if defined(RIOT_VERSION) && defined(MCU_ESP8266)
|
||||
|
||||
rsr a0, EXCSAVE + XCHAL_NMILEVEL /* restore a0 as saved in _NMIExceptionHandler */
|
||||
|
||||
/*************************** NMI Handler BEGIN **************************/
|
||||
/*
|
||||
* PLEASE NOTE: The code between "NMI Handler BEGIN" and
|
||||
* "NMI Handler END" markers was extracted from esp-open-rtos.
|
||||
* It is under the following copyright:
|
||||
*
|
||||
* Part of esp-open-rtos
|
||||
* Original vector contents Copyright (C) 2014-2015 Espressif Systems
|
||||
* Additions Copyright (C) Superhouse Automation Pty Ltd and Angus Gratton
|
||||
* BSD Licensed as described in the file LICENSE.
|
||||
*/
|
||||
wsr sp, excsave3 # excsave3 holds user stack
|
||||
movi sp, .NMIHandlerStackTop - 0x40
|
||||
s32i a0, sp, 0x00
|
||||
s32i a2, sp, 0x04
|
||||
s32i a3, sp, 0x08
|
||||
s32i a4, sp, 0x0c
|
||||
s32i a5, sp, 0x10
|
||||
s32i a6, sp, 0x14
|
||||
s32i a7, sp, 0x18
|
||||
s32i a8, sp, 0x1c
|
||||
s32i a9, sp, 0x20
|
||||
s32i a10, sp, 0x24
|
||||
s32i a11, sp, 0x28
|
||||
rsr a0, epc1
|
||||
s32i a0, sp, 0x2c
|
||||
rsr a0, exccause
|
||||
s32i a0, sp, 0x30
|
||||
rsr a0, excsave1
|
||||
s32i a0, sp, 0x34
|
||||
rsr a0, excvaddr
|
||||
s32i a0, sp, 0x38
|
||||
rsr a0, sar
|
||||
s32i a0, sp, 0x3c
|
||||
movi a0, 0x23 # Override PS for NMI handler
|
||||
wsr a0, ps
|
||||
rsync
|
||||
|
||||
/* mark the stack overflow point before we call the actual NMI handler */
|
||||
movi a0, NMIHandlerStack
|
||||
movi a2, NMI_STACK_CANARY
|
||||
s32i a2, a0, 0x00
|
||||
|
||||
call0 wDev_ProcessFiq
|
||||
|
||||
/* verify we didn't overflow */
|
||||
movi a0, NMIHandlerStack
|
||||
l32i a3, a0, 0
|
||||
movi a2, NMI_STACK_CANARY
|
||||
bne a3, a2, _xt_panic /* .NMIFatalStackOverflow */
|
||||
|
||||
l32i a0, sp, 0x3c
|
||||
wsr a0, sar
|
||||
l32i a0, sp, 0x38
|
||||
wsr a0, excvaddr
|
||||
l32i a0, sp, 0x34
|
||||
wsr a0, excsave1
|
||||
l32i a0, sp, 0x30
|
||||
wsr a0, exccause
|
||||
l32i a0, sp, 0x2c
|
||||
wsr a0, epc1
|
||||
l32i a11, sp, 0x28
|
||||
l32i a10, sp, 0x24
|
||||
l32i a9, sp, 0x20
|
||||
l32i a8, sp, 0x1c
|
||||
l32i a7, sp, 0x18
|
||||
l32i a6, sp, 0x14
|
||||
l32i a5, sp, 0x10
|
||||
l32i a4, sp, 0x0c
|
||||
l32i a3, sp, 0x08
|
||||
movi a0, 0x33 # Reset PS
|
||||
wsr a0, ps
|
||||
rsync
|
||||
/* set dport nmi status to 1 (wDev_ProcessFiq clears bit 0 and verifies it
|
||||
* stays cleared, see
|
||||
* http://esp8266-re.foogod.com/wiki/WDev_ProcessFiq_%28IoT_RTOS_SDK_0.9.9%29)
|
||||
*/
|
||||
movi a0, 0x3ff00000
|
||||
movi a2, 0x1
|
||||
s32i a2, a0, 0
|
||||
l32i a2, sp, 0x04
|
||||
l32i a0, sp, 0x00
|
||||
movi a1, 0x0
|
||||
xsr a1, excsave3 # Load stack back from excsave3, clear excsave3
|
||||
rfi XCHAL_NMILEVEL
|
||||
|
||||
.section .rodata
|
||||
.NMIStackOverflowErrorMsg:
|
||||
.string "\nFATAL: NMI Stack Overflow\n"
|
||||
|
||||
.section .NMIExceptionhandler.text, "ax"
|
||||
.literal_position
|
||||
|
||||
.NMIFatalStackOverflow:
|
||||
movi a2, .NMIStackOverflowErrorMsg
|
||||
call0 printf
|
||||
|
||||
.NMIInfiniteLoop:
|
||||
j .NMIInfiniteLoop /* TODO: replace with call to abort() */
|
||||
|
||||
/*************************** NMI Handler END ****************************/
|
||||
|
||||
#endif /* defined(RIOT_VERSION) && defined(MCU_ESP8266) */
|
||||
|
||||
.align 4
|
||||
.L_xt_nmi_exit:
|
||||
|
||||
Loading…
Reference in New Issue
Block a user