RIOT-OS/RIOT
RIOT-OS/RIOT
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Code Releases Activity
42,314 Commits 40 Branches 189 Tags 262 MiB
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Commit Graph

426 Commits

Author SHA1 Message Date
Teufelchen1
2629e81b3b cpu/sam0_common/periph: Fix compilation with LLVM 2022-12-19 15:19:51 +01:00
Antonio Galea
ee76e21c33 sam0_common: use size_t len for I2C transfers, as declared (fixes #19008) 2022-12-04 16:57:00 +01:00
Juergen Fitschen
268bdfec29 sam0/rtc_rtt: don't block until set_alarm has been propagated to periph 
rtc_set_alarm() / rtt_set_alarm() are heavily used by ztimer during ISR. This will reduce time spent during ISR drastically. We trust that the peripheral is able to propagate the alarm asynchronously.
 2022-11-16 17:02:19 +01:00
Juergen Fitschen
9c6f07f80a sam0/rtc_rtt: optimize pm_unblock/pm_block ping-pong during set alarm 2022-11-16 16:54:29 +01:00
Jue
24461b43f8 cpu/sam0/spi: generalize pm_layered interaction 
In DMA mode SPI transfers are carried out by HW. We need to block certain pm modes during transfer.
 2022-11-03 14:53:44 +01:00
Jue
db9263eeca cpu/sam0/rtc_rtt: integrate pm_layered 2022-11-03 14:53:43 +01:00
Jue
cc4e880aa8 cpu/sam0/rtc: remove overflow IRQ 
Due to the RIOT_EPOCH of 2020 this overflow will happen in year 2084. It would be scary if IoT devices are still around then.

We can save RAM and ROM. Furthermore, this overflow handling should block BACKUP power mode in order to keep track of the reference year.
 2022-11-03 14:52:38 +01:00
Jue
5866262122 cpu/sam0/usbdev: generalize pm_layered interaction 
periph_cpu.h should define the required pm modes.
Additionally, some CPUs require a certain pm mode in USB IDLE mode.
 2022-11-03 14:27:47 +01:00
Jue
220be1da7e cpu/sam0/gpio: integrate pm_layered 2022-11-03 14:27:47 +01:00
Jue
ae9190da30 cpu/sam0/uart: integrate pm_layered 2022-11-03 14:27:47 +01:00
Jue
aa5ad12f37 cpu/sam0/uart: skip uart_write() if uart isn't active 
Otherwise we get stuck in an endless loop ...
 2022-11-03 14:27:47 +01:00
Jue
cf5e207d62 cpu/sam0/uart: enable peripheral clock before accessing regs 2022-11-03 14:27:47 +01:00
Jue
4f25c1017d cpu/sam0/timer: integrate pm_layered 2022-11-03 14:27:47 +01:00
Benjamin Valentin
5843ff4127 cpu/sam0_common: ADC keep muxpos as legacy define 2022-10-04 15:45:25 +02:00
Benjamin Valentin
a7c0bf5341 cpu/sam0_common: adc: drop pin from adc_conf_chan_t 2022-09-27 19:36:10 +02:00
benpicco
baf1687951
Merge pull request #18146 from benpicco/cpu/sam0_common/adc-diffmode 
cpu/sam0_common: adc: add support for differential mode
 2022-09-27 17:34:07 +02:00
Benjamin Valentin
838a5e4bd3 netdev_drivers: make sure to signal LINK_UP at least once 2022-09-16 22:57:28 +02:00
Benjamin Valentin
66153a47cf treewide: fix typos 2022-09-15 23:31:40 +02:00
Kevin "Tristate Tom" Weiss
8a340fec11
Merge pull request #18223 from benpicco/cpu/sam0_common-spi_clk 
cpu/sam0_common: spi: limit clock to source clock
 2022-08-30 19:30:49 +02:00
Dylan Laduranty
950a7d51e9 cpu/sam0/timer: supply all clocks before accessing any regs 
Signed-off-by: Dylan Laduranty <dylan.laduranty@mesotic.com>
 2022-08-30 09:25:46 +02:00
benpicco
28cedd52a0
Merge pull request #18201 from benpicco/slip_dose_rxqueue 
drivers/{dose, slipdev, sam0_eth}: generate RX event for queued packets
 2022-08-26 13:25:13 +02:00
Benjamin Valentin
74dc558972 cpu/{sam0_common, stm32}: select netdev_legacy_api in KConfig 2022-08-17 23:37:05 +02:00
Marian Buschsieweke
276ad5716a
sys/net/gnrc/netif: allow checking if a netdev is legacy or new API 
A if `netdev_driver_t::confirm_send()` is provided, it provides the
new netdev API. However, detecting the API at runtime and handling
both API styles comes at a cost. This can be optimized in case only
new or only old style netdevs are in use.

To do so, this adds the pseudo modules `netdev_legacy_api` and
`netdev_new_api`. As right now no netdev actually implements the new
API, all netdevs pull in `netdev_legacy_api`. If `netdev_legacy_api` is
in used but `netdev_new_api` is not, we can safely assume at compile
time that only legacy netdevs are in use. Similar, if only
`netdev_new_api` is used, only support for the new API is needed. Only
when both are in use, run time checks are needed.

This provides two helper function to check for a netif if the
corresponding netdev implements the old or the new API. (With one
being the inverse of the other.) They are suitable for constant folding
when only new or only legacy devices are in use. Consequently, dead
branches should be eliminated by the optimizer.
 2022-08-17 12:56:07 +02:00
Leandro Lanzieri
88df973783
cpu/sam0_common/sam0_eth: model in Kconfig 2022-07-25 11:08:32 +02:00
Benjamin Valentin
2583239867 cpu/sam0_eth: generate RX event for queued packets 2022-06-17 10:50:31 +02:00
Benjamin Valentin
8a30474f30 cpu/sam0_common: spi: limit clock to source clock 2022-06-16 19:15:37 +02:00
Benjamin Valentin
e8fd493f41 cpu/sam0_common: mtd_sdhc: ensure source address alignment 
The source / destination address of the SDHC transfer needs to be
word-aligned.

Use the mtd buffer to fix the alignment if `mtd_write_page` is used,
otherwise return -ENOTSUP.
 2022-06-16 18:58:10 +02:00
Dylan Laduranty
a6ac93d429
Merge pull request #18150 from benpicco/cpu/sam0_common-rtc_sync 
cpu/sam0_common: RTC: wait for syncbusy in rtc_get_time()
 2022-06-06 22:45:42 +02:00
benpicco
4b6da5c8e4
Merge pull request #17863 from benpicco/sam0_sdhc 
cpu/samd5x: add SD Host Controller implementation
 2022-05-31 15:33:24 +02:00
Benjamin Valentin
d77724bf04 cpu/sam0_common: RTC: wait for syncbusy in rtc_get_time() 
`rtt_get_counter()` already waits for syncbusy before reading the time,
but we also have to do this in RTC mode (`rtc_get_time()`) to avoid
reading old values.

Thus, always wait for syncbusy to clear when accessing the COUNT register.
 2022-05-31 15:26:22 +02:00
Benjamin Valentin
babee877ce cpu/sam0_common: add SD Host Controller implementation 2022-05-31 11:07:20 +02:00
Benjamin Valentin
24e918ca19 cpu/sam0_common: adc: default to 0 for ADC_NEG_INPUT 2022-05-30 20:41:18 +02:00
Benjamin Valentin
d6d5d935a6 cpu/sam0_common: adc: derive GPIO pin from AIN number 
ADC pins are fixed on sam0
 2022-05-30 20:41:18 +02:00
Benjamin Valentin
8075b69275 cpu/sam0_common: adc: handle differential mode 
- store result in int16_t to ensure proper sign extension
 - double differential result to account for bit lost for sign
 2022-05-30 20:41:18 +02:00
Dylan Laduranty
5681cc0a95
Merge pull request #18042 from benpicco/cpu/sam0-adc-extref 
cpu/sam0_common: adc: Automatically configure external reference pin
 2022-05-18 13:37:07 +02:00
Marian Buschsieweke
bae91c1660
Merge pull request #17723 from benpicco/periph_timer_periodic-set_stopped 
drivers/periph/timer: add TIM_FLAG_SET_STOPPED flag
 2022-05-03 12:06:37 +02:00
Benjamin Valentin
35588d46bd cpu/sam0_common: adc: Automatically configure extref pin 2022-05-02 16:23:49 +02:00
Benjamin Valentin
1f96e95fde cpu/sam0_eth: implement SLEEP state 
This saves ~3 mA when the device is in SLEEP mode.
 2022-03-31 23:54:33 +02:00
Alexandre Abadie
7501098a8a
Merge pull request #17819 from aabadie/pr/cpu/samd51_adc_enh 
cpu/samd51: allow to support ADC0 and ADC1 in the same configuration
 2022-03-18 14:09:00 +01:00
chrysn
facb5e633f
Merge pull request #17436 from Ollrogge/reserve_flash 
cpu: add flash_writable section to linker script
 2022-03-17 21:44:32 +01:00
Ollrogge
41f961a197 periph/flashpage: Add _in_address_space feature 2022-03-17 19:45:54 +01:00
Alexandre Abadie
9feb1ffa68
cpu/sam0_common: allow for setting the ADC device for each line 2022-03-17 11:44:40 +01:00
Francisco Molina
53c3e38cb9 sys/ztimer: select ztimer_periph_no_rtt only for samd21 2022-03-15 08:15:22 +01:00
Leandro Lanzieri
f1075ad749
cpu/sam0_common/eth: expose correct setup function 2022-03-04 08:57:42 +01:00
Benjamin Valentin
79698d674b cpu/sam0_common: timer: implement TIM_FLAG_SET_STOPPED flag 2022-03-01 14:22:40 +01:00
Dylan Laduranty
fb24a54208
Merge pull request #17687 from benpicco/cpu/saml21-EXTWAKE 
cpu/sam0_common: implement EXTWAKE for SAM L21
 2022-02-22 21:49:24 +01:00
Benjamin Valentin
7c1c2407b0 cpu/sam0_common: implement EXTWAKE for SAM L21 
On SAM L21 only 8 EXTWAKE pins can wake the CPU from Backup sleep.
Handle this analogous to the RTC tamper pins on SAM D5x/E5x where
configuring them as an interrupt will also cause them to wake the
device from Deep Sleep.
 2022-02-21 19:03:06 +01:00
Benjamin Valentin
9121680204 cpu/sam0_common: decode model number 2022-02-21 15:13:29 +01:00
Francisco Molina
067fa7502d cpu/sam0_common: add periph_spi_init_gpio 2022-02-08 09:21:44 +01:00
Benjamin Valentin
e0f28f81d0 cpu/sam0_common: add missing MUX definitions 
This adds the missing PINMUX modes to the enum.
 2022-01-07 13:03:11 +01:00