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Merge pull request #17436 from Ollrogge/reserve_flash

cpu: add flash_writable section to linker script
This commit is contained in:
chrysn 2022-03-17 21:44:32 +01:00 committed by GitHub
commit facb5e633f
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38 changed files with 162 additions and 2 deletions

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@ -12,6 +12,7 @@ config CPU_FAM_CC2538
select HAS_CPU_CC2538
select HAS_PERIPH_CPUID
select HAS_PERIPH_FLASHPAGE
select HAS_PERIPH_FLASHPAGE_IN_ADDRESS_SPACE
select HAS_PERIPH_FLASHPAGE_PAGEWISE
select HAS_PERIPH_GPIO
select HAS_PERIPH_GPIO_IRQ

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@ -3,6 +3,7 @@ CPU_FAM = cc2538
FEATURES_PROVIDED += periph_cpuid
FEATURES_PROVIDED += periph_flashpage
FEATURES_PROVIDED += periph_flashpage_in_address_space
FEATURES_PROVIDED += periph_flashpage_pagewise
FEATURES_PROVIDED += periph_gpio periph_gpio_irq
FEATURES_PROVIDED += periph_hwrng

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@ -233,6 +233,10 @@ SECTIONS
_eheap1 = ORIGIN(bkup_ram) + LENGTH(bkup_ram);
} > bkup_ram
.flash_writable (NOLOAD) : {
KEEP(*(SORT(.flash_writable.*)))
} > rom
.end_fw (NOLOAD) : ALIGN(4) {
_end_fw = . ;
} > rom

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@ -10,6 +10,7 @@ config CPU_COMMON_EFM32
select HAS_CPU_EFM32
select HAS_PERIPH_CPUID
select HAS_PERIPH_FLASHPAGE
select HAS_PERIPH_FLASHPAGE_IN_ADDRESS_SPACE
select HAS_PERIPH_FLASHPAGE_PAGEWISE
select HAS_PERIPH_GPIO
select HAS_PERIPH_GPIO_IRQ

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@ -11,6 +11,7 @@ endif
FEATURES_PROVIDED += arch_efm32
FEATURES_PROVIDED += periph_cpuid
FEATURES_PROVIDED += periph_flashpage
FEATURES_PROVIDED += periph_flashpage_in_address_space
FEATURES_PROVIDED += periph_flashpage_pagewise
FEATURES_PROVIDED += periph_gpio periph_gpio_irq
FEATURES_PROVIDED += periph_rtt_set_counter

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@ -12,6 +12,7 @@ config CPU_FAM_GD32V
select HAS_PERIPH_CLIC
select HAS_PERIPH_GPIO
select HAS_PERIPH_FLASHPAGE
select HAS_PERIPH_FLASHPAGE_IN_ADDRESS_SPACE
select HAS_PERIPH_FLASHPAGE_PAGEWISE
select HAS_PERIPH_PM
select HAS_PERIPH_TIMER

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@ -7,6 +7,7 @@ FEATURES_PROVIDED += periph_timer_periodic
FEATURES_PROVIDED += periph_wdt
FEATURES_PROVIDED += periph_pm
FEATURES_PROVIDED += periph_flashpage
FEATURES_PROVIDED += periph_flashpage_in_address_space
FEATURES_PROVIDED += periph_flashpage_pagewise
include $(RIOTCPU)/riscv_common/Makefile.features

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@ -30,6 +30,7 @@ config CPU_FAM_K
bool
select CPU_COMMON_KINETIS
select HAS_PERIPH_FLASHPAGE
select HAS_PERIPH_FLASHPAGE_IN_ADDRESS_SPACE
select HAS_PERIPH_FLASHPAGE_PAGEWISE
select HAS_PERIPH_MCG
@ -42,6 +43,7 @@ config CPU_FAM_W
bool
select CPU_COMMON_KINETIS
select HAS_PERIPH_FLASHPAGE
select HAS_PERIPH_FLASHPAGE_IN_ADDRESS_SPACE
select HAS_PERIPH_FLASHPAGE_PAGEWISE
select HAS_PERIPH_MCG

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@ -21,6 +21,7 @@ include $(LAST_MAKEFILEDIR)/kinetis-info.mk
ifneq (,$(filter k w,$(CPU_FAM)))
FEATURES_PROVIDED += periph_flashpage
FEATURES_PROVIDED += periph_flashpage_in_address_space
FEATURES_PROVIDED += periph_flashpage_pagewise
endif

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@ -33,6 +33,7 @@ config CPU_ARCH_MSP430
select HAS_ARCH_MSP430
select HAS_DBGPIN
select HAS_PERIPH_FLASHPAGE
select HAS_PERIPH_FLASHPAGE_IN_ADDRESS_SPACE
select HAS_PERIPH_FLASHPAGE_PAGEWISE
select HAS_NEWLIB
select HAS_PERIPH_PM

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@ -6,5 +6,6 @@ FEATURES_PROVIDED += arch_msp430
FEATURES_PROVIDED += dbgpin
FEATURES_PROVIDED += newlib
FEATURES_PROVIDED += periph_flashpage
FEATURES_PROVIDED += periph_flashpage_in_address_space
FEATURES_PROVIDED += periph_flashpage_pagewise
FEATURES_PROVIDED += periph_pm

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@ -12,6 +12,10 @@ SECTIONS
_srom = ORIGIN(ROM);
_erom = ORIGIN(ROM) + LENGTH(ROM);
.flash_writable (NOLOAD) : {
KEEP(*(SORT(.flash_writable.*)))
} > ROM
.end_fw (NOLOAD) : ALIGN(4) {
_end_fw = . ;
} > ROM

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@ -9,6 +9,7 @@ config CPU_COMMON_NRF5X
select HAS_BLE_NIMBLE
select HAS_PERIPH_CPUID
select HAS_PERIPH_FLASHPAGE
select HAS_PERIPH_FLASHPAGE_IN_ADDRESS_SPACE
select HAS_PERIPH_FLASHPAGE_PAGEWISE
select HAS_PERIPH_GPIO
select HAS_PERIPH_GPIO_IRQ

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@ -1,6 +1,7 @@
# Put defined MCU peripherals here (in alphabetical order)
FEATURES_PROVIDED += periph_cpuid
FEATURES_PROVIDED += periph_flashpage
FEATURES_PROVIDED += periph_flashpage_in_address_space
FEATURES_PROVIDED += periph_flashpage_pagewise
FEATURES_PROVIDED += periph_gpio periph_gpio_irq
FEATURES_PROVIDED += periph_timer_periodic

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@ -9,6 +9,7 @@ config CPU_FAM_NRF9160
select HAS_CPU_NRF9160
select HAS_PERIPH_CPUID
select HAS_PERIPH_FLASHPAGE
select HAS_PERIPH_FLASHPAGE_IN_ADDRESS_SPACE
select HAS_PERIPH_FLASHPAGE_PAGEWISE
select HAS_PERIPH_GPIO
select HAS_PERIPH_GPIO_IRQ

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@ -229,6 +229,10 @@ SECTIONS
PROVIDE( _sp = . );
} >ram AT>ram :ram
.flash_writable (NOLOAD) : {
KEEP(*(SORT(.flash_writable.*)))
} > rom
.end_fw (NOLOAD) : ALIGN(4) {
_end_fw = . ;
} > flash

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@ -9,6 +9,7 @@ config CPU_COMMON_SAM0
bool
select HAS_PERIPH_CPUID
select HAS_PERIPH_FLASHPAGE
select HAS_PERIPH_FLASHPAGE_IN_ADDRESS_SPACE
select HAS_PERIPH_FLASHPAGE_PAGEWISE
select HAS_PERIPH_FLASHPAGE_RWEE
select HAS_PERIPH_GPIO

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@ -8,6 +8,7 @@ ifeq (,$(filter $(CPU_MODELS_WITHOUT_DMA),$(CPU_MODEL)))
endif
FEATURES_PROVIDED += periph_flashpage
FEATURES_PROVIDED += periph_flashpage_in_address_space
FEATURES_PROVIDED += periph_flashpage_pagewise
FEATURES_PROVIDED += periph_flashpage_rwee
FEATURES_PROVIDED += periph_gpio periph_gpio_irq

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@ -14,6 +14,7 @@ FEATURES_PROVIDED += periph_uart_nonblocking
ifneq (,$(filter $(CPU_FAM),f0 f1 f3 g0 g4 l0 l1 l4 l5 u5 wb wl))
FEATURES_PROVIDED += periph_flashpage
FEATURES_PROVIDED += periph_flashpage_in_address_space
FEATURES_PROVIDED += periph_flashpage_pagewise
endif

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@ -14,6 +14,7 @@ config CPU_FAM_F0
select CPU_CORE_CORTEX_M0
select HAS_CPU_STM32F0
select HAS_PERIPH_FLASHPAGE
select HAS_PERIPH_FLASHPAGE_IN_ADDRESS_SPACE
select HAS_PERIPH_FLASHPAGE_PAGEWISE
select HAS_PERIPH_FLASHPAGE_RAW
select HAS_PERIPH_WDT

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@ -13,6 +13,7 @@ config CPU_FAM_F1
select HAS_BOOTLOADER_STM32
select HAS_CPU_STM32F1
select HAS_PERIPH_FLASHPAGE
select HAS_PERIPH_FLASHPAGE_IN_ADDRESS_SPACE
select HAS_PERIPH_FLASHPAGE_PAGEWISE
select HAS_PERIPH_FLASHPAGE_RAW
select HAS_PERIPH_RTT_SET_COUNTER

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@ -11,6 +11,7 @@ config CPU_FAM_F3
select CPU_CORE_CORTEX_M4F
select HAS_CPU_STM32F3
select HAS_PERIPH_FLASHPAGE
select HAS_PERIPH_FLASHPAGE_IN_ADDRESS_SPACE
select HAS_PERIPH_FLASHPAGE_PAGEWISE
select HAS_PERIPH_FLASHPAGE_RAW
select HAS_PERIPH_RTC_MEM

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@ -11,6 +11,7 @@ config CPU_FAM_G0
select CPU_CORE_CORTEX_M0PLUS
select HAS_CPU_STM32G0
select HAS_PERIPH_FLASHPAGE
select HAS_PERIPH_FLASHPAGE_IN_ADDRESS_SPACE
select HAS_PERIPH_FLASHPAGE_PAGEWISE
select HAS_PERIPH_FLASHPAGE_RAW
select HAS_PERIPH_VBAT

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@ -12,6 +12,7 @@ config CPU_FAM_G4
select HAS_CPU_STM32G4
select HAS_CORTEXM_MPU
select HAS_PERIPH_FLASHPAGE
select HAS_PERIPH_FLASHPAGE_IN_ADDRESS_SPACE
select HAS_PERIPH_FLASHPAGE_PAGEWISE
select HAS_PERIPH_HWRNG
select HAS_PERIPH_VBAT

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@ -11,6 +11,7 @@ config CPU_FAM_L0
select CPU_CORE_CORTEX_M0PLUS
select HAS_CPU_STM32L0
select HAS_PERIPH_FLASHPAGE
select HAS_PERIPH_FLASHPAGE_IN_ADDRESS_SPACE
select HAS_PERIPH_FLASHPAGE_PAGEWISE
select HAS_PERIPH_EEPROM
select HAS_PERIPH_RTC_MEM

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@ -12,6 +12,7 @@ config CPU_FAM_L1
select HAS_CPU_STM32L1
select HAS_CORTEXM_MPU
select HAS_PERIPH_FLASHPAGE
select HAS_PERIPH_FLASHPAGE_IN_ADDRESS_SPACE
select HAS_PERIPH_FLASHPAGE_PAGEWISE
select HAS_PERIPH_EEPROM
select HAS_PERIPH_RTC_MEM

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@ -12,6 +12,7 @@ config CPU_FAM_L4
select HAS_CPU_STM32L4
select HAS_CORTEXM_MPU
select HAS_PERIPH_FLASHPAGE
select HAS_PERIPH_FLASHPAGE_IN_ADDRESS_SPACE
select HAS_PERIPH_FLASHPAGE_PAGEWISE
select HAS_PERIPH_HWRNG
select HAS_PERIPH_RTC_MEM

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@ -11,6 +11,7 @@ config CPU_FAM_L5
select CPU_CORE_CORTEX_M33
select HAS_CPU_STM32L5
select HAS_PERIPH_FLASHPAGE
select HAS_PERIPH_FLASHPAGE_IN_ADDRESS_SPACE
select HAS_PERIPH_FLASHPAGE_PAGEWISE
select HAS_PERIPH_HWRNG
select HAS_PERIPH_RTC_MEM

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@ -12,6 +12,7 @@ config CPU_FAM_U5
select HAS_BACKUP_RAM
select HAS_CPU_STM32U5
select HAS_PERIPH_FLASHPAGE
select HAS_PERIPH_FLASHPAGE_IN_ADDRESS_SPACE
select HAS_PERIPH_FLASHPAGE_PAGEWISE
select HAS_PERIPH_HWRNG
select HAS_PERIPH_RTC_MEM

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@ -11,6 +11,7 @@ config CPU_FAM_WB
select CPU_CORE_CORTEX_M4
select HAS_CPU_STM32WB
select HAS_PERIPH_FLASHPAGE
select HAS_PERIPH_FLASHPAGE_IN_ADDRESS_SPACE
select HAS_PERIPH_FLASHPAGE_PAGEWISE
select HAS_PERIPH_HWRNG
select HAS_PERIPH_RTC_MEM

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@ -12,6 +12,7 @@ config CPU_FAM_WL
select CPU_CORE_CORTEX_M4
select HAS_CPU_STM32WL
select HAS_PERIPH_FLASHPAGE
select HAS_PERIPH_FLASHPAGE_IN_ADDRESS_SPACE
select HAS_PERIPH_FLASHPAGE_PAGEWISE
select HAS_PERIPH_RTC_MEM
select HAS_PERIPH_VBAT

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@ -151,6 +151,31 @@ enum {
#error "periph/flashpage: FLASHPAGE_NUMOF not defined"
#endif
#ifdef MODULE_PERIPH_FLASHPAGE_IN_ADDRESS_SPACE
/**
* @def FLASH_WRITABLE_INIT(name, size)
* @brief Define an array in flash memory
*
* This macro defines an array stored in the ".flash_writable" section
* which is part of flash memory. With this macro it is possible to
* reserve flash memory at build time.
*
* E.g. FLASH_WRITABLE_INIT(a, 2); will create a array with name 'a'
* of size 2 * @ref FLASHPAGE_SIZE which is stored in flash memory and takes up
* 2 flash pages.
*
* Symbols created by using this macro are sorted in ascending order by name.
* Therefore, &a < &b where a and b are arrays created using this macro.
*
* @param[in] name name of the array
* @param[in] size size of the array in unit of @ref FLASHPAGE_SIZE
*/
#define FLASH_WRITABLE_INIT(name, size) \
__attribute__((aligned(FLASHPAGE_SIZE))) \
__attribute__((section(".flash_writable." #name))) \
static const uint8_t name [size * FLASHPAGE_SIZE]
#endif
/**
* @brief Get the page size of the given page number
*

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@ -14,6 +14,11 @@ menuconfig MODULE_PERIPH_FLASHPAGE
# periph_init_% modules are handled in Makefile. We need to define them to keep
# the list the same for now. We should be able to remove them later on.
config MODULE_PERIPH_FLASHPAGE_IN_ADDRESS_SPACE
bool "Static memory sections can fundamentally be turned into flash pages"
depends on HAS_PERIPH_FLASHPAGE_IN_ADDRESS_SPACE
depends on MODULE_PERIPH_FLASHPAGE_PAGEWISE
config MODULE_PERIPH_INIT_FLASHPAGE
bool "Auto initialize Flashpage peripheral"
default y if MODULE_PERIPH_INIT

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@ -73,6 +73,12 @@ config HAS_ETHERNET
help
Indicates that Ethernet connectivity is present.
config HAS_PERIPH_FLASHPAGE_IN_ADDRESS_SPACE
bool
help
Indicates that static memory sections can fundamentally be turned
into flash pages.
config HAS_HIGHLEVEL_STDIO
bool
help

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@ -8,6 +8,7 @@
config APPLICATION
bool
default y
imply MODULE_PERIPH_FLASHPAGE_IN_ADDRESS_SPACE
imply MODULE_PERIPH_FLASHPAGE_PAGEWISE
imply MODULE_PERIPH_FLASHPAGE_RWEE
depends on TEST_KCONFIG

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@ -2,6 +2,7 @@ BOARD ?= iotlab-m3
include ../Makefile.tests_common
FEATURES_REQUIRED += periph_flashpage
FEATURES_OPTIONAL += periph_flashpage_in_address_space
FEATURES_OPTIONAL += periph_flashpage_pagewise
FEATURES_OPTIONAL += periph_flashpage_rwee

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@ -18,6 +18,7 @@
* @}
*/
#include <assert.h>
#include <inttypes.h>
#include <stdio.h>
#include <string.h>
@ -55,7 +56,19 @@ static char raw_buf[RAW_BUF_SIZE] ALIGNMENT_ATTR;
* requires 64 bit alignment.
*/
static uint8_t page_mem[FLASHPAGE_SIZE] ALIGNMENT_ATTR;
#endif
#ifdef MODULE_PERIPH_FLASHPAGE_IN_ADDRESS_SPACE
/**
* @brief Reserve 1 page of flash memory
*/
FLASH_WRITABLE_INIT(_backing_memory, 0x1);
/*
* @brief Created to test the sorting of symbols in .flash_writable section
*/
FLASH_WRITABLE_INIT(_abacking_memory, 0x1);
#endif /* MODULE_PERIPH_FLASHPAGE_IN_ADDRESS_SPACE */
#endif /* MODULE_PERIPH_FLASHPAGE_PAGEWISE */
static int getpage(const char *str)
{
@ -361,7 +374,63 @@ static int cmd_test_last(int argc, char **argv)
puts("wrote local page buffer to last flash page");
return 0;
}
#endif
#ifdef MODULE_PERIPH_FLASHPAGE_IN_ADDRESS_SPACE
/**
* @brief Does a write and verify test on reserved page
*/
static int cmd_test_reserved(int argc, char **argv)
{
(void) argc;
(void) argv;
/**
* Arrays created by the FLASH_WRITABLE_INIT macro should be sorted in
* ascending order by name.
*/
assert(&_abacking_memory < &_backing_memory);
char fill = 'a';
const char sig[] = {"RIOT"};
unsigned page = flashpage_page((void *)_backing_memory);
printf("Reserved page num: %u \n", page);
flashpage_read(page, page_mem);
/* test is running for the first time so initialize flash */
if (memcmp(sig, &page_mem[1], sizeof(sig)) != 0) {
page_mem[0] = 0;
memcpy(&page_mem[1], sig, sizeof(sig));
}
else {
page_mem[0]++;
}
printf("Since the last firmware update this test has been run "
"%u times \n", page_mem[0]);
/* fill memory after counter and signature */
for (unsigned i = 0x1 + sizeof(sig); i < sizeof(page_mem); i++) {
page_mem[i] = (uint8_t)fill++;
if (fill > 'z') {
fill = 'a';
}
}
if (flashpage_write_and_verify(page, page_mem) != FLASHPAGE_OK) {
puts("error verifying the content of reserved page");
return 1;
}
puts("wrote local page buffer to reserved flash page");
puts("\nWhen running on a bootloader, as an extra check, try restarting "
"the board and check whether this application still comes up.");
return 0;
}
#endif /* MODULE_PERIPH_FLASHPAGE_IN_ADDRESS_SPACE */
#endif /* MODULE_PERIPH_FLASHPAGE_PAGEWISE */
/**
* @brief Does a short raw write on last page available
@ -641,6 +710,9 @@ static const shell_command_t shell_commands[] = {
{ "edit", "Write bytes to the local page buffer", cmd_edit },
{ "test", "Write and verify test pattern", cmd_test },
{ "test_last_pagewise", "Write and verify test pattern on last page available", cmd_test_last },
#endif
#ifdef MODULE_PERIPH_FLASHPAGE_IN_ADDRESS_SPACE
{ "test_reserved_pagewise", "Write and verify short write on reserved page", cmd_test_reserved},
#endif
{ "test_last_raw", "Write and verify raw short write on last page available", cmd_test_last_raw },
#ifdef FLASHPAGE_RWWEE_NUMOF

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@ -29,6 +29,15 @@ def testfunc(child):
child.expect_exact('wrote local page buffer to last flash page')
child.expect('>')
# check if board has flash page reservation capability and if so test that as well
# capability is deduced from help contents
child.sendline("help")
index = child.expect(['test_reserved_pagewise', '>'])
if index == 0:
child.sendline("test_reserved_pagewise")
child.expect_exact('wrote local page buffer to reserved flash page')
child.expect('>')
# check if board has RWWEE capability and if so test that as well
# capability is deduced from help contents
child.sendline("help")