This implements a basic Real Time Clock based on TIM2.
As the timer is too fast and wraps around after just 8 bits, it is
not used directly. Instead TIM2 is responsible for providing a 1 Hz
tick by generating an alarm every second.
The current time data is kept in the `.noinit` section, so it will survive
a reboot, but the clock will not be updated while the bootloader runs, so
expect inaccuracies.
For atmega boards a TX has not actually completed until UDRn is empty
as well as the Transmit Shift Register.
To avoid resetting an UART before a TX has completed we use the TXCn
flash and ISR to set a variables that indicates TX is ongoing. This
allows not reseting the UART while there are ongoing TX pending.
This fixes an issue where part of the last byte is not shifted out
of the TX shift register causing rubish on the first TX following an
uart_init.
- Using a enum instead of _COUNTER is easier to read
- _COUNTER is also a reserved name; so better not use it to avoid issues
- Split out the pcint code into a static inline function for increased
readability
The bank index and the pin number are not necessarily identical. For all
PCINT banks except for bank 3 bank_idx was used therefore. It was likely
just forgotten to update that for bank 3 as well.
Names with two leading underscores are reserved in any context of the c
standard, and thus must not be used. This ATmega platform used it however for
defining internal stuff. This commit fixes this.
Moved macros and static inline helper functions needed to access ATmega GPIOs
to cpu/atmega_common/include/atmega_gpio.h in order to reuse them for the
platform specific low level part of the Neopixel driver.
ATmega128RFA1/ATmega256RFR2 do not have a unique CPU ID.
Use the RC oscillator callibration byte as an impromptu CPU ID and rely
on bootlader constants present on all ATmega families for the remaining
bytes.
This way we can provide a faux CPU ID on all ATmega MCUs and typical hobbyists
with no access to JTAG adapters or high voltage programmer capable of writing
the user signature have a good chance that the CPU IDs of their device do not collide.
The brr calculation on the datasheet is different than what is implmented.
This is intentional since it provides better rounding due to truncation.
There was no comment explaining that so this comment should prevent confusion.
- correct number of timers for atmega328p from 2 to 1
- correct number of timer channels for atmega328p from 3 to 2
- adapt atmega periph timer implementation accordingly
Removes duplicated code for atmega platforms. They were all
basically the same, only with the exception of atmegarfr2,
for which there is an #if statement to use the code in the
same file.
This Patch makes gpio_init precalculate the pin mask once,
This Patch makes gpio_init of atmega_common configure the pin as an input and configure the pullup in the case of GPIO_IN_PU.
GPIO_IN_PU and GPIO_IN need to change pullup so they need to change output (this is coverd by the not touching outputs is not guaranteed statement)
(this is a special case for atmega the pull_up is configured by writing 1 to the port_register which is also the level of the output if the pin is configured to output).
This fix makes it more compliant to comments in periph/gpio.h
A debug pin can be used to probe timer interrupts with an oscilloscope or
other time measurement equipment. Thus, determine when an interrupt occurs
and how long the timer ISR takes.
The pin should be defined in the makefile as follows:
CFLAGS += -DDEBUG_TIMER_PORT=PORTF -DDEBUG_TIMER_DDR=DDRF \
-DDEBUG_TIMER_PIN=PORTF4
fixes the GPIO_LOW interrupt on the atmega platform.
It results from trying to shift GPIO_LOW. Since it is 0, it is not shiftable and will not be set correctly.
There were more issues with the other flanks too, as they are 0b01 or 0b00. If 0b11 was set as a flank before it would not be able to switch to any other mode anymore. Now the bits get cleared before the new flank will be written.
