Joakim Nohlgård
b3d04d8270
riscv: Reduce reset trampoline code size by 2 bytes
...
`addi` with 20 bit immediate does not have a compressed representation,
so using `jalr` with immediate offset uncompressed is smaller than using
`addi`+`c.jr`
2022-12-08 13:26:07 +01:00
PeterKietzmann
6215b7e630
cpu/riscv_common: add puf_sram feature
2022-02-16 15:18:37 +01:00
PeterKietzmann
992e09b07b
cpu/riscv_common: add bss end to clear memory
2022-02-16 10:52:09 +01:00
Benjamin Valentin
0f625eaebd
cpu/riscv_common: call cpu_init()
2021-10-13 23:21:56 +02:00
Joakim Nohlgård
b70a4b7694
riscv: Simplify reset trampoline
...
By loading the absolute address of _start_real we can unconditionally
jump to it regardless if the PC is somewhere at 0x0 or at ROM_START_ADDR
2021-09-22 10:37:23 +02:00
c1d81cfb56
cpu/riscv_common: Jump to rom start on boot
...
With this the riscv start code jumps to the ROM start on boot when the
ROM area doesn't start at address 0x0.
2021-08-24 10:30:12 +02:00
2692957c0e
riscv_common: Refactor common fe310 code to riscv_common
2021-02-05 09:32:19 +01:00
