cpu/riscv_common: add bss end to clear memory

2025-01-17 05:32:45 +01:00 · 2022-02-16 10:52:09 +01:00 · 2022-02-16 10:52:09 +01:00 · 992e09b07b
commit 992e09b07b
parent dd4fe70a62
2 changed files with 3 additions and 1 deletions
--- a/cpu/riscv_common/ldscripts/riscv_base.ld
+++ b/cpu/riscv_common/ldscripts/riscv_base.ld
@ -205,6 +205,7 @@ SECTIONS
    *(COMMON)
    . = ALIGN(4);
  } >ram AT>ram :ram
+  PROVIDE( __bss_end = . );

  .noinit (NOLOAD) :
  {
--- a/cpu/riscv_common/start.S
+++ b/cpu/riscv_common/start.S
@ -41,9 +41,10 @@ _start_real:
    bltu a1, a2, 1b
 2:

+
    /* Clear bss section */
    la a0, __bss_start
-    la a1, _end
+    la a1, __bss_end
    bgeu a0, a1, 2f
 1:
    sw zero, (a0)