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10 Commits

Author SHA1 Message Date
Marian Buschsieweke
36e8526046
drivers/periph_gpio_ll: change API to access GPIO ports
The API was based on the assumption that GPIO ports are mapped in memory
sanely, so that a `GPIO_PORT(num)` macro would work allow for constant
folding when `num` is known and still be efficient when it is not.

Some MCUs, however, will need a look up tables to efficiently translate
GPIO port numbers to the port's base address. This will prevent the use
of such a `GPIO_PORT(num)` macro in constant initializers.

As a result, we rather provide `GPIO_PORT_0`, `GPIO_PORT_1`, etc. macros
for each GPIO port present (regardless of MCU naming scheme), as well as
`GPIO_PORT_A`, `GPIO_PORT_B`, etc. macros if (and only if) the MCU port
naming scheme uses letters rather than numbers.

These can be defined as macros to the peripheral base address even when
those are randomly mapped into the address space. In addition, a C
function `gpio_port()` replaces the role of the `GPIO_PORT()` and
`gpio_port_num()` the `GPIO_PORT_NUM()` macro. Those functions will
still be implemented as efficient as possible and will allow constant
folding where it was formerly possible. Hence, there is no downside for
MCUs with sane peripheral memory mapping, but it is highly beneficial
for the crazy ones.

There are also two benefits for the non-crazy MCUs:
1. We can now test for valid port numbers with `#ifdef GPIO_PORT_<NUM>`
    - This directly benefits the test in `tests/periph/gpio_ll`, which
      can now provide a valid GPIO port for each and every board
    - Writing to invalid memory mapped I/O addresses was treated as
      triggering undefined behavior by the compiler and used as a
      optimization opportunity
2. We can now detect at compile time if the naming scheme of the MCU
   uses letters or numbers, and produce more user friendly output.
    - This is directly applied in the test app
2024-08-02 09:55:24 +02:00
Joshua DeWeese
aef5dfec2b cpu/stm32/gpio_ll: make style consistent
This block of code inconsistently made use of else-if statments. The
patch makes the use consistent. The change also makes the code a bit
simpler to read.
2024-04-02 11:51:20 -04:00
Joshua DeWeese
1b1fbfeb5c cpu/stm32/gpio_ll: fix ifdef
APB12 is never defined as a macro. It is an element in the bus_t enum.
Therefore, the test to check if it is defined will always fail.

APB12 is not a real bus. It is the second register of the APB1 bus. I am
not aware of any STM32 family where the ABP2 bus is implmented (ie
RCC_APB2ENR_SYSCFGEN is defined) and devices attached to said bus are
enabled via the APB1 second register. For this reason, the fix is to
simply remove the check.
2024-04-02 11:34:50 -04:00
Jason Parker
b5d72d8242 cpu/stm32: add CPU_FAM_STM32C0 support 2024-01-29 14:44:10 -05:00
krzysztof-cabaj
29502b2dc4 cpu/stm32/periph: fix typo - or RAM 2024-01-01 13:26:24 +01:00
Marian Buschsieweke
dd86da6c76
cpu/stm32/periph_gpio_ll: Fix misleading comments
The comments still claim STM32F1 support is missing, but this was
recently added.

Also, drop an empty line to fix `too many consecutive empty lines`
nitpick of the CI.
2023-04-06 08:31:48 +02:00
Marian Buschsieweke
8bfd74d004
cpu/stm32: Fix periph_gpio_ll_irq
Fixing a high impact typo that broke GPIO LL IRQ support on a bunch
of STM32 families.
2023-04-04 17:23:21 +02:00
Marian Buschsieweke
03dfa495ff
cpu/stm32: Implement GPIO LL IRQ support for STM32F1 2023-03-22 10:40:25 +01:00
Marian Buschsieweke
4a0c462ec3
cpu/stm32: Implement gpio_ll for STM32F1
This provides basic GPIO LL support. IRQ support will be added as
follow up.
2023-03-20 14:14:07 +01:00
Marian Buschsieweke
8bab36f1c5
cpu/stm32: Implement periph/gpio_ll{,_irq} except for STM32F1
Co-authored-by: Gunar Schorcht <gunar@schorcht.net>
Co-authored-by: Alexandre Abadie <alexandre.abadie@inria.fr>
2022-04-22 14:34:57 +02:00