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Commit Graph

4273 Commits

Author SHA1 Message Date
kenrabold
97d1dc0821 cpu/fe310: Add support for FE310_G002
Added support for FE310_G002 CPU variant that is on new HiFive1B board
2019-07-19 13:25:17 -07:00
Benjamin Valentin
56891fe7f2 cpu/sam0: update doc.txt with new MCU families 2019-07-17 11:37:46 +02:00
francisco
38ffe80a96 cpu/stm32l151cb_a: include _A suffix in CPU_MODEL defines 2019-07-09 08:56:37 +02:00
francisco
1d03634407 stm32_common/stm32_mem_length: fix RAM_LEN for stm32l1xx-A/X cpu's 2019-07-09 08:56:35 +02:00
Kevin "Bear Puncher" Weiss
f976aeb1af
Merge pull request #11720 from benemorius/efm32-gpio-init-int-disable
cpu/efm32/periph_gpio: fix wrong GPIO_IntDisable() in gpio_init_int()
2019-07-08 15:36:38 +02:00
7340de6129
cpu/stm32l4: add support for stm32l4r5zi model 2019-07-08 09:09:47 +02:00
3881128884
cpu/stm32_common: extend memory lengths support 2019-07-08 09:09:46 +02:00
33a878b70c
cpu/smt32l4: fix quadspi IRQ in vectors table 2019-07-08 09:09:46 +02:00
3f141e9184
Merge pull request #11314 from fjmolinas/pr_stm32l1_eeprom_null
cpu/stm32l1: fix issue when  writing NULL bytes to eeprom
2019-07-04 18:36:30 +02:00
francisco
8f1a835a59 stm32_common/eeprom: add _IO prefix to hardware access 2019-07-04 15:52:25 +02:00
francisco
f2f7fe1bab stm32l1/eeprom: fix eeprom write for cat 1 2019-07-04 15:51:32 +02:00
9e6d558596
stm32_eth: Code cleanup and some fixes
cpu/stm32_common: cleanup periph eth
boards/nucleo-f767zi: cleanup dependencies
boards/nucleo-f767zi: fix dma configuration attribute for eth
examples/default: add nucleo-767zi in boards with netif
drivers/stm_32_eth: Add header guard for eth_config

Co-authored-By: Robin <robin@chilio.net>
2019-07-04 15:27:50 +02:00
Robin
4729bea46e
stm32_eth: Multiple Improvements of the original codebase
stm32eth: Move to stm32_common periph
cpu/stm32_periph_eth: Rebase to current master branch

- Update DMA to use new vendor headers
- Update send to use iolist. It looks like the packet headers are now transfered as seperate iolist entries which results in the eth periph sending each header as own packet. To fix this a rather ugly workaround is used where the whole iolist content is first copied to a static buffer. This will be fixed soon in another commit
- If MAC is set to zero use luid to generate one
- Small code style fixes

cpu/stm312f7: Add periph config for on-board ethernet
boards/nucleo-f767zi: Add config for on board ethernet
tests/stm32_eth_lwip: Remove board restriction
boards/common/nucleo: Add luid module if stm32 ethernet is used
tests/stm32_eth_gnrc: Add Testcase for gnrc using the stm32 eth periph
stm32_eth: Rework netdev driver layour
tests/stm32_eth_*: Use netdev driver header file for prototypes
stm32_eth: Add auto init for stm32 eth netdev driver
boards/stm32: Enable ethernet conf for nucleo boards
stm32_eth_auto_init: Add dont be pendantic flag
stm32_eth: Remove dma specific stuff from periph_cpu.h

Looks like this was implemented in PR #9171 and 021697ae94 with the same interface.

stm32_eth: Remove eth feature from stm32f4discovery boards
stm32_eth: Migrate to stm32 DMA API
stm32_eth: Add iolist to module deps
stm32_eth: Rework send function to use iolist
stm32_eth: Fix ci build warnings
stm32_eth: Fix bug introduced with iolist usage
stm32_eth: Remove redundant static buffer
stm32_eth: Fix feature dependencies
stm32_eth: Fix wrong header guard name
stm32_eth: Implement correct l2 netstats interface
stm32_eth: Rename public functions to stm32_eth_*
stm32_eth: Fix doccheck
stm32_eth: Move register DEFINE to appropriate header file
stm32_eth: remove untested configuration for f446ze boards
stm32_eth: Move periph configuration struct to stm32_common
stm32_eth: Fix naming of eth_phy_read and eth_phy_write
stm32_eth: Remove obsolete test applications
2019-07-04 15:27:26 +02:00
Victor Arino
e206087d65
stm32_eth: Initial implementation by Victor Arino
drivers/eth-phy: add generic Ethernet PHY iface
cpu/stm32f4: implement eth driver peripheral

This implements the ethernet (MAC) peripheral of the stm32f4 as a
netdev driver.
boards/stm32f4discovery: add eth configuration
boards/stm32f4discovery: add feature stm32_eth
tests/stm32_eth_lwip: add test application
2019-07-04 15:04:01 +02:00
Hauke Petersen
1744b6bd92
Merge pull request #11559 from PeterKietzmann/pr_nrf5x_hwrng_softdev
cpu/nrf5x_common: map hwrng to SoC library if SoftDevice is present
2019-07-04 14:23:55 +02:00
PeterKietzmann
7ee9905fa6 cpu/nrf5x_common: map hwrng to SoC library if SoftDevice is present 2019-07-04 12:12:28 +02:00
5a62ec9798
Merge pull request #11790 from fjmolinas/pr_fix_wait_for_pending_isr
stm32_common/flash_common: fix _wait_for_pending_isr()
2019-07-04 11:28:50 +02:00
3f984a1128
Merge pull request #11776 from fjmolinas/pr_fix_stm32_flashpage
stm32_common/flashpage: fix stm32l4 erase error
2019-07-04 10:58:56 +02:00
francisco
24ea728007 stm32_common/flashpage: _wait_for_pending_operations() before write 2019-07-04 10:45:41 +02:00
francisco
7f675e9ca9 stm32_common/flash_common: properly clear EOP bit
- EOP bit is cleared by writing 1 to the register.
- Guard EOP bit clear for STM32F2, STM32F4, STM32F7
  and STM32L4 EOP bit is only set if EOPIE is enabled.
  Since this is not the case for any platform we exclude
  it when not needed.
2019-07-04 10:45:41 +02:00
59933d291b
Merge pull request #11758 from fjmolinas/pr_optimize_pm_stm32f
cpu/stm32: optimize stop mode for stm32f*
2019-07-04 10:36:24 +02:00
francisco
1b7a8611d8 cpu/stm32_common: minimize consumption for STM32F1
- With this PR all GPIOs are set as AIN on start up.
2019-07-03 16:50:21 +02:00
fjmolinas
940b80243f cpu/stm32_common: minimize consumption for STM32F0/2/3/4/7
- With this PR, On start up all GPIOs are configured as AIN. For stm32l0/4
  this is done by default. Doing this saves the consumption of the input Schmitt
  trigger in STOP mode which can reduce the consumption in at least 70%
  from current master.
2019-07-03 16:50:21 +02:00
francisco
26a8013502 stm32l4/flashpage: fix page erase
- The PNB in FLASH_CR wasn't cleared before every erase operation
  and the new value was just stacked on top. After a couple of erase
  the PNB written was overlapping with old ones failing to erase the
  correct page.
2019-07-03 09:30:06 +02:00
Francisco
bc6303fb59
Merge pull request #11750 from aabadie/pr/cpu/stm32l1-4_flashpage_numof
cpu/stm32l{1,4}: refactor flashpage numof macros
2019-07-01 14:58:10 +02:00
3b58b4b6b6
cpu/stm32f3: add support for flashpage 2019-06-28 17:16:10 +02:00
ea441bab5e
Merge pull request #11713 from bergzand/pr/nrf5x/uart_modecfg
nrf5x: Add UART modecfg feature implementation
2019-06-28 13:56:44 +02:00
Leandro Lanzieri
56ffb45f6c
Merge pull request #11719 from benemorius/efm32-numof_irqs-off-by-one
cpu/efm32/periph_gpio: fix NUMOF_IRQS off-by-one error
2019-06-28 11:25:04 +02:00
81df812c5b
nrf5x: Add UART modecfg feature implementation 2019-06-28 09:56:40 +02:00
Kevin "Bear Puncher" Weiss
135ad3817b
Merge pull request #10982 from gschorcht/cpu/esp8266/periph/pwm/pr
cpu/esp8266: fix pwm_set func
2019-06-27 16:35:53 +02:00
Gunar Schorcht
d3e0b78f7c cpu/esp8266: fix of set func in periph/pwm
In the `pwm_set` function, the switch-on and switch-off times for PWM channels were only determined for the following phase, but not for the current phase. This could result in a missing duty cycle when calling the function `pwm_set` if the switch-on time of the current phase was not yet reached or to an extended duty cycle if the switch-off time of the current phase had not yet been reached.
2019-06-26 16:00:02 +02:00
ee5181dd50
cpu/stm32l4: use flash size define to get the number of pages 2019-06-26 08:46:19 +02:00
cef14009d9
cpu/stm32l1: use flash size define to get the number of pages 2019-06-26 08:46:08 +02:00
56085b10a0
Merge pull request #11698 from bergzand/pr/usb/nrfusb_suspend
nrf52: Add suspend/resume detection to usbdev
2019-06-25 16:12:27 +02:00
ee39222b2e
nrf52: Add suspend/resume detection to usbdev 2019-06-25 15:39:52 +02:00
Sebastian Meiling
7fa201ef24
Merge pull request #11729 from MrKevinWeiss/pr/kinetis/i2c/errorcodefix
cpu/kinetis/i2c: Fix false positive for expected EIO during i2c write
2019-06-21 13:18:26 +02:00
Kevin "Bear Puncher" Weiss
a290f2d66c
Merge pull request #11712 from bergzand/pr/sam0_common/uart_modecfg
sam0_common: add uart modecfg support
2019-06-21 13:08:07 +02:00
MrKevinWeiss
ec62f1ccce cpu/kinetis/i2c: Suppress cppcheck unreadVariable warning
On cppcheck 1.82 it throws a warning.
Since it costs cycles and does nothing the ++dummy is (void)dummy.
A warning suppression is added so the CI is happy.
2019-06-21 12:29:14 +02:00
Sebastian Meiling
44d09f3ca0
Merge pull request #11728 from MrKevinWeiss/pr/stm/i2c2/fix
cpu/stm32/i2c: Fix error flag clearing in sr1
2019-06-21 11:43:09 +02:00
3241aff71c
sam0_common: add uart modecfg 2019-06-21 10:54:24 +02:00
Benjamin Valentin
99344e8030 cpu/samd5x: make sure RIOTBOOT_LEN is 2*FLASHPAGE_SIZE
The flashpage size on samd5x is 8k, so set RIOTBOOT_LEN accordingly.
2019-06-21 09:47:04 +02:00
Dylan Laduranty
c3c810b36e
Merge pull request #11655 from benpicco/same5x-fix_clock
cpu/samd5x: CPU init fixes
2019-06-21 09:44:54 +02:00
MrKevinWeiss
6419a7a3aa cpu/kinetis/i2c: Fix false positive for expected EIO during i2c write
This fixes the positive result when master write data is NACKed.
This false positive occurs when the write frame is finished but a data nack occurred.
The AF check should occur first.
2019-06-20 16:32:25 +02:00
MrKevinWeiss
b5db0dab2d cpu/stm32/i2c: Fix error flag clearing in sr1
This commit fixes the clearing of a error condition after read.
This causes the incorrect errorcodes if the register is read
then an error occurs, then it is cleared.
By clearing only after the error is processed the bug is fixed.
This can be tested by reading a i2c slave that is not there.
2019-06-20 15:53:44 +02:00
Benjamin Valentin
f29ca155d8 cpu/samd5x: fix CPU init
There were still some things wrong with samd5x CPU init which only
showed up when used in conjunction with RIOTBOOT, that is cpu_init()
was called twice.

 - gclk_connect() should block until the GCLK is ready.
 - DPLL should be disabled dring configuration.
 - make sure not to use DPLL for MCLK when re-configuring DPLL
 - All APBxMASK bits should be in a defined state.
 - always enable 1kHz oscilator output.
2019-06-20 11:29:05 +02:00
a671c6c247
Merge pull request #11715 from fjmolinas/pr_stm32_flashpage_cleanup
stm32_common/flashpage: cleanup
2019-06-20 10:03:18 +02:00
francisco
46b90134ad stm32_common/flashpage: cleanup stm32l0/1
- Since writes are performed per word no actions need
  to be performed for flash access, and the FPRG doesn't
  need to be cleared.
2019-06-20 09:43:13 +02:00
francisco
5e709edb31 stm32_common/flashpage: remove repeated command 2019-06-20 09:31:48 +02:00
francisco
eb78d35096 stm32_common/flashpage: make implicit CPU_FAM defines explicit 2019-06-20 09:28:27 +02:00
francisco
10875890e0 stm32_common/flashpage: use HSI only for stm32f0/1
- Before, HSI was enabled as the default case when it is only
  used for stm32f0 and stm32f1. It is now implemented explicitly
  for those platforms, and only those.
2019-06-20 09:27:26 +02:00