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Commit Graph

6813 Commits

Author SHA1 Message Date
Akshai M
1f7a10305a stm32/periph/flashpage: Reset cache
Co-authored-by: Francisco <femolina@uc.cl>
2021-04-20 21:04:36 +02:00
Akshai M
efb86039c6 cpu/stm32wl: Add RTT support 2021-04-20 21:04:36 +02:00
Akshai M
2cf081b509 cpu/stm32wl: Flashpage configuration 2021-04-20 21:04:36 +02:00
Akshai M
df1cae172c stm32/irqs: Adapt generators to support WL
Co-authored-by: Alexandre Abadie <alexandre.abadie@inria.fr>
2021-04-20 21:04:36 +02:00
Akshai M
b816c67bdd nucleo-wl55jc: Add Kconfig files 2021-04-20 21:04:35 +02:00
Akshai M
fd8ddd6161 boards: add nucleo-wl55jc
Co-authored-by: Kevin "Tristate Tom" Weiss <weiss.kevin604@gmail.com>
2021-04-20 21:04:29 +02:00
Akshai M
c485c774cf cpu/stm32: add stm32wl 2021-04-20 20:57:48 +02:00
benpicco
bd6114ae9d
Merge pull request #16187 from benpicco/cpu/sam0_common/get_tamper
cpu/sam0_common: add rtc_get_tamper_event()
2021-04-13 14:11:46 +02:00
Benjamin Valentin
13fbb7c1a0 cpu/sam0_common: add rtc_tamper_pin_mask() 2021-04-13 10:45:16 +02:00
Benjamin Valentin
9d482c4448 cpu/sam0_common: RTC: only write TAMPCTRL when tamper is enabled
If we configure TAMPCTRL early, GPIO events will set bits in the
TAMPCTRL register.
That means that after a wake-up, we can't tell if the bit was set
because it was the wake-up source or if it was already set by a
run-time GPIO event.
2021-04-13 10:45:16 +02:00
Benjamin Valentin
73dbda99ac cpu/sam0_common: add rtc_get_tamper()
Add a function to query which tamper event woke the CPU from hibernation.
2021-04-13 10:45:16 +02:00
Hauke Petersen
e28ec7907b
Merge pull request #15806 from haukepetersen/opt_nrf5x_nrfblehfxo
cpu/nrf/radio/nrfble: request HFXO only on demand
2021-04-12 11:04:12 +02:00
Marian Buschsieweke
ac774f3404
Merge pull request #16212 from nandojve/xmega_pm
cpu/atxmega: Add periph power management
2021-04-07 11:45:24 +02:00
Francisco
700046238f
Merge pull request #16261 from maribu/cpu/stm32/periph_eth
cpu/stm32/periph_eth: fix format specifier in DEBUG()
2021-04-07 09:32:09 +02:00
369868e7a2
cpu/lpc23xx: remove unused flashrom code 2021-04-05 17:07:29 +02:00
Gerson Fernando Budke
93ed3cd9d6 cpu/atxmega: Add periph power management
The current xmega don't have a way to disable peripherals that are
not in used.  Add peripheral management to allow enable only the mcu
blocks that will be used by application.  This saves power on active
and sleep modes.  By default, at clock initialization, all peripherals
are now disabled and each drive must activate at initialization phase.
The periph_timer and periph_uart were updated with this new feature.

Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
2021-04-02 14:24:31 -03:00
Francisco
e04dd4dcce
Merge pull request #16272 from jue89/fix/stm32_gpio_irq
cpu/stm32/gpio: fix IRQ handler
2021-04-02 13:07:39 +02:00
Francisco
9d1d2f9e21
Merge pull request #16172 from kfessel/p-zimer-sec
sys/ztimer: add ZTIMER_SEC, improve auto_init
2021-04-02 08:32:38 +02:00
Jue
43f83a520b cpu/stm32/gpio: fix IRQ handler 2021-04-01 19:31:27 +01:00
Karl Fessel
15f2d0008a native/rtc: ensure no struct tm extra information is used 2021-04-01 18:19:15 +02:00
Karl Fessel
72213ec99a native/rtc: avoid dealing with DST 2021-04-01 18:19:15 +02:00
dylad
99764b82ab cpu/sam0: correct periph_cpu_common.h documentation 2021-03-31 22:17:01 +02:00
Marian Buschsieweke
164aa72250
cpu/stm32/periph_eth: fix format specifier in DEBUG()
Use PRIu32 instead of lu to make LLVM happy.
2021-03-31 10:11:46 +02:00
chrysn
fa9a297e7c
Merge pull request #16250 from chrysn-pull-requests/nrf52-more-timers
cpu/nrf52: Expose more timers
2021-03-30 20:28:27 +02:00
Marian Buschsieweke
ca8641c213
Merge pull request #16258 from maribu/cpu/sam3/periph_rtt
cpu/sam3/periph_rtt: fix rtt_get_alarm()
2021-03-30 17:47:30 +02:00
chrysn
2b09d3162a cpu/nrf52: Expose more timers 2021-03-30 16:34:44 +02:00
Marian Buschsieweke
8919b2c847
Merge pull request #16257 from fjmolinas/pr_arduino_due_config_freq
boards/arduino-due: allow changing frequency
2021-03-30 16:17:43 +02:00
Marian Buschsieweke
d816666d84
cpu/sam3/periph_rtt: fix rtt_get_alarm()
Previously, the return value was off by one.
2021-03-30 14:49:11 +02:00
Francisco Molina
89c0b2a827
cpu/sam3: add unified RTT configuration 2021-03-30 14:28:58 +02:00
Marian Buschsieweke
5e5f86fdc1
Merge pull request #16241 from nandojve/xmega_fix_clk_sel_after_dfll_en
cpu/atxmega/atxmega_cpu: Fix clk sel after dfll en
2021-03-30 13:16:23 +02:00
Francisco
2b7a6acecf
Merge pull request #16252 from maribu/avr-ldscipts
cpu/avr8_common: move ldscripts from atmega_common
2021-03-30 12:13:28 +02:00
Marian Buschsieweke
5cc62437da
cpu/avr8_common: move ldscripts from atmega_common
The ldscripts are already used for both ATmega and ATxmega, so it
makes sense to have them in the common folder.
2021-03-30 10:50:09 +02:00
Karl Fessel
cf7078ab0a stm32/ptp: avoid creating a new rounding rule 2021-03-29 16:27:27 +02:00
Gerson Fernando Budke
53235dd2e2 cpu/atxmega/atxmega_cpu: Fix clk sel after dfll en
The current ATxmega clock_init enable DFLL to improve the accuracy of
the 2MHz and 32MHz internal oscillators.  In some ATxmega revisions,
after started DFLL the clock become unstable.  Add another sync point
for 32MHz internal oscilator.

Note:  If clock is not stable, system won't switch from 2MHz to 32MHz
as main clock.

Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
2021-03-28 11:40:39 -03:00
Marian Buschsieweke
28e6544748
Merge pull request #16236 from maribu/cpu/stm32/periph_eth
cpu/stm32/periph_eth: bugfix
2021-03-28 09:20:15 +02:00
Marian Buschsieweke
7b08b97eb6
cpu/stm32/periph_eth: bugfix & cleanup
Fix compilation with module `stm32_eth_link_up` when `stm32_eth_auto`
is not used by relying on the compiler to optimize unused functions
and variables out, rather than using the preprocessor.
2021-03-26 17:42:45 +01:00
Marian Buschsieweke
650559276f
cpu/stm32/periph_ptp: bugfix & better debug output
- Clear the PTP timer interrupt *after* the user callback is executed
    - Otherwise it would be possible that the ISR sets another super
      short timeout that triggers during ISR, which also gets cleared
    - This is a pretty nasty race condition :-/
- The debug output was a bit too verbose to be generally useful. Some
  noise is now silenced unless `DEBUG_VERBOSE` is `#define`d to 1
2021-03-23 22:58:10 +01:00
benpicco
ee5b70730b
Merge pull request #15758 from nandojve/avr8_xmega
Introduce ATxmega CPU and Boards
2021-03-20 22:09:07 +01:00
benpicco
9ea7f5b9ed
Merge pull request #16169 from benpicco/cpu/stm32/candev_cleanup
cpu/stm32: candev: derive number of CAN interfaces from vendor header
2021-03-18 11:47:33 +01:00
Gerson Fernando Budke
699248c65f makefiles/arch/atmega.inc.mk: Rename to avr8.inc.mk
Atmel AVR-8 CPU was reworked to accomodate variants like ATxmega.
This rename to atmega.inc.mk to avr8.inc.mk to be compliant with
new directory structure.

Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
2021-03-15 20:16:10 -03:00
Gerson Fernando Budke
aa3af4e2fa cpu/avr8_common/avr8_cpu: Add xmega clock
ATxmega have many clock options.  This introduce clk_init into cpu_init
to allow user select between a default configuration or perform fine
clock tune.

Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
2021-03-15 20:16:10 -03:00
Gerson Fernando Budke
f1eaa4caf3 cpu/avr8_common/avr8_cpu: Enable xmega pmic
The XMEGA CPU have a Programmable Multilevel Interrupt Controller.
This enables all three PMIC levels.  By default, all interrupts are
preconfigured as LOW Level without Round Robin queue.  This works
as any MCU with interrupt enabled.

In order to get benefit from Multilevel Interrupts user need increase
the interrupt level by own.

Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
2021-03-15 20:16:10 -03:00
Gerson Fernando Budke
70c597620f cpu/avr8_common: Differentiate avr8 cpu cores
Current there is no way to split code between ATmega and ATxmega in
drivers.  This differentiate AVR8 cores into MEGAs and XMEGAs.

Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
2021-03-15 20:16:10 -03:00
Gerson Fernando Budke
facede13fd cpu/avr8_common: Rework and add xmega registers
The current context switch and thread stack init don't have a generic
way to save/restore registers for all AVR-8 variations.  This add
defines to check flash/data sizes and rework:

 - thread_stack_init
 - avr8_context_save
 - avr8_context_restore

The new implementation add missing RAMP D/X/Y registers that are used
by XMEGA variations.

The rules to add EIND, RAMP(D,X,Y,Z) register are:

 - EIND must be added if device have more than 128k flash.  This means,
   device can access more than 64k words in flash.
 - RAMP D/X/Y must be added if device have or can address more than
   64k data.
 - RAMPZ must be added if device can address more than 64k bytes of
   flash or data.

With above rules there is no necessity to check by device because it is
mandatory the registers for those MCU variations.

Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
2021-03-15 20:16:10 -03:00
Gerson Fernando Budke
8c1203c646 cpu/avr8_common: Add xmega reset cause register
Add missing ATxmega reset cause register.  This shares same definitions
from ATmega CPU.

Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
2021-03-15 20:16:10 -03:00
Gerson Fernando Budke
1a88f0bad6 cpu: Introduce Atmel xmega cpu
Add ATxmega common files and cpu definitions.

This works was originally developed by @Josar.  The 2018 version
were port to 2021 mainline.

This version changes original port to have only the atxmega CPU
definition. With that, all family can be accomodated.

Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
2021-03-15 20:16:10 -03:00
Gerson Fernando Budke
d041199825 cpu/avr8_common: Move irq_enable from board to cpu
Some mega boards enabling global irq at board_init.  This moves that
responsability to cpu/avr8_common to create a common point to all
variants.

Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
2021-03-15 20:16:10 -03:00
Gerson Fernando Budke
9081a3b7c7 cpu/avr8_common/include/cpu.h: Increase number of uart
The ATxmega can have up to 8 UARTs.  This increase from 2 up to 7 to
keep avr8_state flags with 8 bits wide.

Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
2021-03-15 20:16:10 -03:00
Leandro Lanzieri
246391a9fa
cpu/nrf52/nrf802154: use driver specific legacy pseudomodule
This introduces the nrf802154_netdev_legacy pseudomodule that switches
to the netdev-based implementation of the nrf802154 radio driver.
2021-03-10 14:18:12 +01:00
Leandro Lanzieri
f0e7dfdf76
cpu/cc2538/radio: use driver specific legacy pseudomodule
This introduces the cc2538_rf_netdev_legacy pseudomodule that switches
to the netdev-based implementation of the cc2538 radio driver.
2021-03-10 14:18:12 +01:00