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Commit Graph

5700 Commits

Author SHA1 Message Date
15110af51c
Merge pull request #14475 from leandrolanzieri/pr/kconfig/mips32r2_boards_symbols
boards/mips32r2-based: Model features in Kconfig
2020-07-16 15:14:29 +02:00
Leandro Lanzieri
52b31b5fce
cpu/lm4f120: Add Kconfig symbols
Also specify CPU_FAM in Makefile.features
2020-07-16 13:23:30 +02:00
Leandro Lanzieri
710c21805d
cpu/mips_pic32mz: Add Kconfig symbols 2020-07-16 13:20:05 +02:00
Leandro Lanzieri
6091c31bd6
cpu/mips_pic32mx: Add Kconfig symbols 2020-07-16 13:20:05 +02:00
Leandro Lanzieri
c1b25655fd
cpu/mips_pic32_common: Add Kconfig symbols 2020-07-16 13:20:04 +02:00
Leandro Lanzieri
ea3166e08e
cpu/mips32r2_common: Add Kconfig symbols
Also this moves the specification of CPU_ARCH to the common folder
2020-07-16 13:20:01 +02:00
8046a74e50
cpu/stm32: model features in Kconfig 2020-07-16 11:34:02 +02:00
055c43c878
cpu/stm32: enable flashpage feature for stm32f031k6 2020-07-16 11:15:30 +02:00
Leandro Lanzieri
6a9c28aa72
cpu/nrf52: Add Kconfig symbols 2020-07-16 10:23:49 +02:00
Leandro Lanzieri
83252e8f0d
cpu/nrf51: Add Kconfig symbols 2020-07-16 10:23:49 +02:00
Leandro Lanzieri
31b288443a
cpu/nrfx_common: Add Kconfig symbols 2020-07-16 10:23:48 +02:00
7fd25f21c9
Merge pull request #14426 from maribu/stm32f4_uart_init
cpu/stm32: Fix garbage on UART init
2020-07-15 21:14:42 +02:00
Francisco
1167867d02
Merge pull request #14362 from maribu/msp430-irq-inline
cpu/msp430_common: Update to inline-able IRQ API
2020-07-15 15:34:04 +02:00
Marian Buschsieweke
1a8defd209
cpu/msp430_common: Refactor cpu.{c,h}
Drop `__enable_irq()` and `__disable_irq()` and replace single remaining
call of them with the standard IRQ API, as this is now equally fast.
2020-07-15 13:09:11 +02:00
Marian Buschsieweke
aec9eb7f6a
cpu/stm32: Fix uart_init()
- Make use of the fact that gpio_init_af() does not need prior call to
  gpio_init() for all STM32 families anymore and drop call to gpio_init()
- Initialize the UART periph first, before initializing the pins
    - While uninitialized, the UART periph will send signal LOW to TXD. This
      results in a start bit being picked up by the other side.
    - Instead, we do not connect the UART periph to the pins until it is
      initialized, so that the TXD level will already be HIGH when the pins
      are attached.
    - This results in no more garbage being send during initialization
2020-07-15 12:12:46 +02:00
Marian Buschsieweke
73c9161517
cpu/stm32: Fix gpio_init() / gpio_int_af()
- Do not set an intermediate mode, prepare correct mode settings in a temporary
  variable
- Consistently enabled the GPIO periph in gpio_init_af()
    - Previously, STM32 F1 did not require a separate call to gpio_init() prior
      to a call of gpio_init_af(), but other STM32 families did
    - Now, gpio_init_af() can be used without gpio_init() consistently
- STM32 F1: Do not touch ODR for non input pins
    - For input pins, this enables / disabled pull up resistors. For outputs,
      this register should remain untouched (according to API doc)
2020-07-15 12:12:45 +02:00
Marian Buschsieweke
91a294aa45
cpu/cortexm_common: Drop LTO workaround for Cortex M thread_arch.c
The `ldr    r1, =sched_active_thread` instruction couldn't be assembled with
LTO, as the no immediate offset could be found to construct the address of
`sched_active_thread`. This commit instructs the assembler to generate a
literate pool which can be used to construct the address. While this issue
was only triggered during LTO, it theoretically could also pop up without LTO
due to unrelated changes. Thus, it is a good idea to create the literate pool
even without LTO enabled.
2020-07-15 10:37:15 +02:00
Marian Buschsieweke
0feebcb094
cpu/cortexm_common: Drop #7776's LTO workaround
The workaround from #7776 is no longer needed with recent toolchains, e.g. such
as the toolchain in the riot/riotbuild docker image.
2020-07-15 10:37:15 +02:00
Gilles DOFFE
892370121d
cpu/stm32/qdec: test null callback pointer (#14125)
cpu/stm32/qdec: test if callback pointer is set

Callback pointer is not tested and could result in a hard fault
if the pointer is NULL.
Thus only activate interrupt if a callback provided.

Signed-off-by: Gilles DOFFE <g.doffe@gmail.com>
2020-07-10 15:05:53 +02:00
Gunar Schorcht
fb47f094d3 cpu/esp32: support multiple heaps for newlib
Several unsused DRAM sections are added to the heap.
2020-07-10 08:42:12 +02:00
benpicco
30ebabb84e
Merge pull request #14007 from benpicco/cpu/sam0_common-pwm
cpu/sam0_common: move PWM to common code, add support for saml21, samd5x
2020-07-09 10:01:08 +02:00
Bas Stottelaar
1d97783175 cpu/efm32: DCDC is available on Series 2 as well 2020-07-08 21:54:57 +02:00
Bas Stottelaar
1105f60a23 cpu/efm32: make series defines explicit
The EFM32 uses the provided _SILICON_LABS_32B_SERIES_0 and
_SILICON_LABS_32B_SERIES_1 definitions to enable or disable certain
code. With the introduction of new MCUs, there is also the
_SILICON_LABS_32B_SERIES_2 definition.

This PR ensures that the defines are explicit, and that #else
statements don't target the wrong series.
2020-07-08 21:54:57 +02:00
Benjamin Valentin
bce7d25f10 cpu/sam0_common: add PWM support for saml2x, samd5x 2020-07-08 21:51:12 +02:00
benpicco
63a0014456
Merge pull request #14467 from benpicco/fix_file_permission
treewide: fix file permissions
2020-07-08 18:30:01 +02:00
Benjamin Valentin
9d836888c2 treewide: fix file permissions
C files should not be executable.
2020-07-08 17:32:36 +02:00
benpicco
99553e882c
Merge pull request #14461 from hugueslarrive/iss14361
Fix bad assertion in cpu/stm32/periph/pwm.c
2020-07-08 16:42:08 +02:00
hugues
11e847c9af cpu/stm32: fix off-by-one error in clock frequency assert 2020-07-08 14:17:14 +02:00
d02d54b76a
Merge pull request #14455 from benpicco/fe310-heap_markers
cpu/fe310: use common names for heap markers
2020-07-08 14:14:38 +02:00
Benjamin Valentin
0ddca68de9 cpu/fe310: use common names for heap markers
Other archs use `_sheap` and `_eheap` to mark the start and end of
the heap.

fe310 uses `_heap_start` and `_heap_end`, so platform independent
code that wants to make use of this will needlessly fail.

For compatibility with common code, name them the same on fe310.
2020-07-07 17:25:00 +02:00
Leandro Lanzieri
7a2e4c819d
cpu/esp8266: Add Kconfig symbols 2020-07-07 16:27:43 +02:00
Leandro Lanzieri
0b0a03bef9
cpu/esp32: Add Kconfig symbols 2020-07-07 16:27:35 +02:00
Leandro Lanzieri
e6b698c69b
cpu/esp_common: Add Kconfig symbols 2020-07-07 16:27:34 +02:00
Jean Pierre Dudey
3003cf737a
boards/common/esp32: move ESP features to cpu/esp_common
>All of them are features of each ESP SoC and have not to be configured by the
board definition.

Signed-off-by: Jean Pierre Dudey <jeandudey@hotmail.com>
Co-authored-by: Gunar Schorcht <gunar@schorcht.net>
2020-07-07 16:02:23 +02:00
Martine Lenders
60469026cf
Merge pull request #14434 from maribu/irq_cleanup
cpu/cortexm_common: Fix cpu_switch_context_exit()
2020-07-04 11:42:54 +02:00
Marian Buschsieweke
056100c1ca
cpu/cortexm_common: Fix cpu_switch_context_exit()
- Use `irq_enable()` over `bl irq_enable`, as `irq_enable()` is an inline
  function and not a C function any more
- Drop `__attribute__((naked))` qualifier
    - It must be used with the declaration of the function, but there it is
      missing. (And it cannot be added there, as this function would need to
      be implemented as "naked" by every platform; which is impossible for
      platforms not supporting `__attribute__((naked))`.)
    - Only functions consisting completely of basic asm may be marked as naked.
      But both the assembly used to trigger the SVC interrupt as well as the
      assembly used in `irq_enable()` are extended asm, not basic asm
- Use ` UNREACHABLE();` over a custom asm construct
2020-07-03 12:48:42 +02:00
Leandro Lanzieri
215e77f2ad
cpu/kinetis: Add Kconfig symbols 2020-07-02 14:41:41 +02:00
Leandro Lanzieri
6ea04d146b
cpu/kinetis: Provide features based on CPU series
Also, rename CPU_FAMILY to the standard CPU_FAM.
2020-07-02 14:41:39 +02:00
Francisco
772b638d2a
Merge pull request #14405 from aabadie/pr/cpu/mips_no_binfile
cpu/mips: disable BINFILE generation
2020-07-01 10:21:41 +02:00
Francisco
41888674a4
Merge pull request #14385 from aabadie/pr/make/appdeps_export
boards/mips: remove use of APPDEPS, un-export globally APPDEPS
2020-07-01 09:13:35 +02:00
b3e566bcd8
cpu/mips: disable BINFILE generation 2020-07-01 08:08:23 +02:00
Peter Kietzmann
2250c67240
Merge pull request #14388 from leandrolanzieri/pr/kconfig/ezr32wg_board_symbols
boards/slwstk6220a: Model features provided in Kconfig
2020-06-30 18:24:44 +02:00
Francisco
325b7a8d8e
Merge pull request #13631 from benpicco/cpu/sam0_common/spi-deinit
drivers/periph/spi: add periph_spi_reconfigure feature & implementation for sam0
2020-06-30 15:34:53 +02:00
Gunar Schorcht
028c0d4b3c
Merge pull request #14353 from fjmolinas/pr_reorder_makefiles_cleanup
Makefile: use normal conditionals
2020-06-30 09:59:02 +02:00
Francisco Molina
e98341da93
Makefile: use normal conditionals 2020-06-29 22:40:29 +02:00
Leandro Lanzieri
339432583c
cpu/ezr32wg: Add Kconfig symbols
Also define CPU_FAM in Makefile.features
2020-06-29 14:01:01 +02:00
ffa28e415a
cpu/mips_pic32_common: add cpu_model specific assembly symbols dependency 2020-06-28 12:13:32 +02:00
Gunar Schorcht
e247ced04c cpu/esp: add feature arch_esp for all ESP SoCs
There are common features that can be used by ESP32 as well as ESP8266, for example the `esp_wifi` module. To be able to test for any ESP SoC, feature `arch_esp` is introduced.
2020-06-27 11:30:59 +02:00
Marian Buschsieweke
414e17b437
Merge pull request #14360 from aabadie/pr/cpu/fe310_inline_irq
cpu/fe310: migrate to inlined irq API
2020-06-26 13:00:22 +02:00
279f2aebed
Merge pull request #14224 from kaspar030/cortexm_remove_idle_thread
core: make idle thread optional
2020-06-26 11:04:19 +02:00